On Tue, 20 Nov 2018, Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx> wrote:
> Fix a spelling mistake in a comment.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx>
Thanks for the patch, pushed to drm-intel-next-queued.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index f9ce35da4123..742f8ff101e4 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4280,7 +4280,7 @@ static void gen10_sseu_device_status(struct drm_i915_private *dev_priv,
> for (s = 0; s < info->sseu.max_slices; s++) {
> /*
> * FIXME: Valid SS Mask respects the spec and read
> - * only valid bits for those registers, excluding reserverd
> + * only valid bits for those registers, excluding reserved
> * although this seems wrong because it would leave many
> * subslices without ACK.
> */
--
Jani Nikula, Intel Open Source Graphics Center
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