On Thu, 2018-11-15 at 11:48 -0800, clinton.a.taylor@xxxxxxxxx wrote: > From: Clint Taylor <clinton.a.taylor@xxxxxxxxx> > > The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv > during > driver init. Use this value instead of reading the register again as > the > power well for PORTA RCOMP register may not be enabled and will > return > 0xFFFFFFFF instead of the computed value. > Tested-by: Matt Atwood <matthew.s.atwood@xxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Clint Taylor <clinton.a.taylor@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c > b/drivers/gpu/drm/i915/intel_dpio_phy.c > index 3c7f10d..7cee57f 100644 > --- a/drivers/gpu/drm/i915/intel_dpio_phy.c > +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c > @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct > drm_i915_private *dev_priv, > * the corresponding calibrated value from PHY1, and > disable > * the automatic calibration on PHY0. > */ > - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv, > - phy_info- > >rcomp_phy); > + if (!dev_priv->bxt_phy_grc) > + val = dev_priv->bxt_phy_grc = > bxt_get_grc(dev_priv, > + phy_i > nfo->rcomp_phy); > + else > + val = dev_priv->bxt_phy_grc; > + > grc_code = val << GRC_CODE_FAST_SHIFT | > val << GRC_CODE_SLOW_SHIFT | > val; _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
