On Thu, Nov 08, 2018 at 05:09:55PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Reduce the clutter in the sprite update functions by writing > both TILEOFF and LINOFF registers unconditionally. We already > did this for primary planes so might as well do it for the > sprites too. > > There is no harm in writing both registers. Which one gets > used depends on the tilimg mode selected in the plane control > registers. > > It might even make sense to clear the register that won't > get used. That could make register dumps a little easier to > parse. But I'm not sure it's worth the extra hassle. > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Pushed with Maarten's irc r-b. > --- > drivers/gpu/drm/i915/intel_sprite.c | 21 +++++++-------------- > 1 file changed, 7 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 1293182dbcb0..06e8845b071d 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -792,7 +792,6 @@ vlv_update_plane(struct intel_plane *plane, > const struct intel_plane_state *plane_state) > { > struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - const struct drm_framebuffer *fb = plane_state->base.fb; > enum pipe pipe = plane->pipe; > enum plane_id plane_id = plane->id; > u32 sprctl = plane_state->ctl; > @@ -829,10 +828,8 @@ vlv_update_plane(struct intel_plane *plane, > plane_state->color_plane[0].stride); > I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x); > > - if (fb->modifier == I915_FORMAT_MOD_X_TILED) > - I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x); > - else > - I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset); > + I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x); > + I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset); > > I915_WRITE_FW(SPCONSTALPHA(pipe, plane_id), 0); > > @@ -950,7 +947,6 @@ ivb_update_plane(struct intel_plane *plane, > const struct intel_plane_state *plane_state) > { > struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - const struct drm_framebuffer *fb = plane_state->base.fb; > enum pipe pipe = plane->pipe; > u32 sprctl = plane_state->ctl, sprscale = 0; > u32 sprsurf_offset = plane_state->color_plane[0].offset; > @@ -990,12 +986,12 @@ ivb_update_plane(struct intel_plane *plane, > > /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET > * register */ > - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > I915_WRITE_FW(SPROFFSET(pipe), (y << 16) | x); > - else if (fb->modifier == I915_FORMAT_MOD_X_TILED) > + } else { > I915_WRITE_FW(SPRTILEOFF(pipe), (y << 16) | x); > - else > I915_WRITE_FW(SPRLINOFF(pipe), linear_offset); > + } > > I915_WRITE_FW(SPRSIZE(pipe), (crtc_h << 16) | crtc_w); > if (IS_IVYBRIDGE(dev_priv)) > @@ -1119,7 +1115,6 @@ g4x_update_plane(struct intel_plane *plane, > const struct intel_plane_state *plane_state) > { > struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - const struct drm_framebuffer *fb = plane_state->base.fb; > enum pipe pipe = plane->pipe; > u32 dvscntr = plane_state->ctl, dvsscale = 0; > u32 dvssurf_offset = plane_state->color_plane[0].offset; > @@ -1157,10 +1152,8 @@ g4x_update_plane(struct intel_plane *plane, > I915_WRITE_FW(DVSSTRIDE(pipe), plane_state->color_plane[0].stride); > I915_WRITE_FW(DVSPOS(pipe), (crtc_y << 16) | crtc_x); > > - if (fb->modifier == I915_FORMAT_MOD_X_TILED) > - I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x); > - else > - I915_WRITE_FW(DVSLINOFF(pipe), linear_offset); > + I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x); > + I915_WRITE_FW(DVSLINOFF(pipe), linear_offset); > > I915_WRITE_FW(DVSSIZE(pipe), (crtc_h << 16) | crtc_w); > I915_WRITE_FW(DVSSCALE(pipe), dvsscale); > -- > 2.18.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx