== Series Details == Series: i915 pvmmio to improve GVTg performance URL : https://patchwork.freedesktop.org/series/52410/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9c2f6b34b1d3 drm/i915: introduced pv capability for vgpu -:68: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects? #68: FILE: drivers/gpu/drm/i915/i915_drv.h:3877: +#define PVMMIO_LEVEL_ENABLE(dev_priv, level) \ + (intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \ + && (dev_priv->vgpu.pv_caps & level)) -:68: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'level' may be better as '(level)' to avoid precedence issues #68: FILE: drivers/gpu/drm/i915/i915_drv.h:3877: +#define PVMMIO_LEVEL_ENABLE(dev_priv, level) \ + (intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \ + && (dev_priv->vgpu.pv_caps & level)) -:70: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line #70: FILE: drivers/gpu/drm/i915/i915_drv.h:3879: + (intel_vgpu_active(dev_priv) && intel_vgpu_has_pvmmio(dev_priv) \ + && (dev_priv->vgpu.pv_caps & level)) -:139: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #139: FILE: drivers/gpu/drm/i915/i915_vgpu.c:94: + __raw_i915_write32(dev_priv, vgtif_reg(pvmmio_caps), + dev_priv->vgpu.pv_caps); -:143: CHECK:LINE_SPACING: Please don't use multiple blank lines #143: FILE: drivers/gpu/drm/i915/i915_vgpu.c:98: + + -:145: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #145: FILE: drivers/gpu/drm/i915/i915_vgpu.c:100: + DRM_INFO("Virtual GPU for Intel GVT-g detected with pvmmio 0x%x\n", + dev_priv->vgpu.pv_caps); total: 0 errors, 0 warnings, 6 checks, 97 lines checked 26121d00d625 drm/i915: get ready of memory for pvmmio -:56: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment #56: FILE: drivers/gpu/drm/i915/i915_drv.h:1356: + spinlock_t shared_page_lock; -:143: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #143: FILE: drivers/gpu/drm/i915/i915_vgpu.c:107: + __raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.lo), + lower_32_bits(gpa)); -:145: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #145: FILE: drivers/gpu/drm/i915/i915_vgpu.c:109: + __raw_i915_write32(dev_priv, vgtif_reg(shared_page_gpa.hi), + upper_32_bits(gpa)); -:147: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #147: FILE: drivers/gpu/drm/i915/i915_vgpu.c:111: + if (gpa != __raw_i915_read64(dev_priv, + vgtif_reg(shared_page_gpa))) { -:155: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #155: FILE: drivers/gpu/drm/i915/i915_vgpu.c:119: + __raw_i915_write32(dev_priv, vgtif_reg(g2v_notify), + VGT_G2V_SHARED_PAGE_SETUP); total: 0 errors, 0 warnings, 5 checks, 103 lines checked 544deaecea2e drm/i915: context submission pvmmio optimization -:73: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #73: FILE: drivers/gpu/drm/i915/intel_lrc.c:407: +static inline void write_desc(struct intel_engine_cs *engine, + u64 desc, u32 port) -:84: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #84: FILE: drivers/gpu/drm/i915/intel_lrc.c:420: +static inline void write_desc_pv(struct intel_engine_cs *engine, + u64 desc, u32 port) -:96: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #96: FILE: drivers/gpu/drm/i915/intel_lrc.c:432: + __raw_i915_write32(dev_priv, vgtif_reg(g2v_notify), + VGT_G2V_ELSP_SUBMIT); -:146: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #146: FILE: drivers/gpu/drm/i915/intel_ringbuffer.h:527: + void (*write_desc)(struct intel_engine_cs *engine, + u64 desc, u32 port); total: 0 errors, 0 warnings, 4 checks, 89 lines checked 2f13c56ed4a4 drm/i915: ppgtt update pvmmio optimization -:41: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line #41: FILE: drivers/gpu/drm/i915/i915_gem.c:5538: + if ((intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv)) + || PVMMIO_LEVEL_ENABLE(dev_priv, PVMMIO_PPGTT_UPDATE)) -:54: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #54: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:956: +static void gen8_ppgtt_clear_4lvl_pv(struct i915_address_space *vm, + u64 start, u64 length) -:80: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #80: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1216: +static void gen8_ppgtt_insert_4lvl_pv(struct i915_address_space *vm, + struct i915_vma *vma, -:106: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #106: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1532: +static int gen8_ppgtt_alloc_4lvl_pv(struct i915_address_space *vm, + u64 start, u64 length) total: 0 errors, 0 warnings, 4 checks, 117 lines checked a10129739054 drm/i915/gvt: GVTg handle pvmmio_caps PVINFO register -:88: CHECK:LINE_SPACING: Please don't use multiple blank lines #88: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:66: + total: 0 errors, 0 warnings, 1 checks, 62 lines checked 94f6273822da drm/i915/gvt: GVTg handle shared_page setup -:36: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #36: FILE: drivers/gpu/drm/i915/gvt/gvt.h:239: + bool shared_page_enabled; -:46: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #46: FILE: drivers/gpu/drm/i915/gvt/gvt.h:699: +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len); -:88: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #88: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1235: +static int handle_shared_page_gpa(struct intel_vgpu *vgpu, + unsigned int offset, unsigned int data) -:150: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #150: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:598: +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len) total: 0 errors, 0 warnings, 4 checks, 119 lines checked 19f7d5f0f66d drm/i915/gvt: GVTg support context submission pvmmio optimization -:35: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'vgpu' - possible side-effects? #35: FILE: drivers/gpu/drm/i915/gvt/gvt.h:58: +#define VGPU_PVMMIO(vgpu, level) \ + ((vgpu_vreg_t(vgpu, vgtif_reg(pvmmio_caps)) & level) \ + && vgpu->shared_page_enabled) -:35: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'level' may be better as '(level)' to avoid precedence issues #35: FILE: drivers/gpu/drm/i915/gvt/gvt.h:58: +#define VGPU_PVMMIO(vgpu, level) \ + ((vgpu_vreg_t(vgpu, vgtif_reg(pvmmio_caps)) & level) \ + && vgpu->shared_page_enabled) -:37: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line #37: FILE: drivers/gpu/drm/i915/gvt/gvt.h:60: + ((vgpu_vreg_t(vgpu, vgtif_reg(pvmmio_caps)) & level) \ + && vgpu->shared_page_enabled) -:71: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #71: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1204: + if (intel_gvt_read_shared_page(vgpu, elsp_data_off, &elsp_data, + 16 * I915_NUM_ENGINES)) total: 0 errors, 0 warnings, 4 checks, 81 lines checked c3aa9b70d559 drm/i915/gvt: GVTg support ppgtt pvmmio optimization -:86: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #86: FILE: drivers/gpu/drm/i915/gvt/gtt.c:1810: + gvt_vgpu_err("fail to create ppgtt for pdp 0x%llx\n", + px_dma(&mm->ppgtt->pml4)); -:116: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #116: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2820: +int intel_vgpu_g2v_pv_ppgtt_alloc_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]) -:141: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #141: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2845: +int intel_vgpu_g2v_pv_ppgtt_clear_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]) -:169: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects? #169: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2873: +#define pml4_addr_end(addr, end) \ +({ unsigned long __boundary = \ + ((addr) + GEN8_PML4E_SIZE) & GEN8_PML4E_SIZE_MASK; \ + (__boundary < (end)) ? __boundary : (end); \ +}) -:175: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects? #175: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2879: +#define pdp_addr_end(addr, end) \ +({ unsigned long __boundary = \ + ((addr) + GEN8_PDPE_SIZE) & GEN8_PDPE_SIZE_MASK; \ + (__boundary < (end)) ? __boundary : (end); \ +}) -:181: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects? #181: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2885: +#define pd_addr_end(addr, end) \ +({ unsigned long __boundary = \ + ((addr) + GEN8_PDE_SIZE) & GEN8_PDE_SIZE_MASK; \ + (__boundary < (end)) ? __boundary : (end); \ +}) -:194: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #194: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2898: +static int walk_pt_range(struct intel_vgpu *vgpu, u64 pt, + u64 start, u64 end, struct ppgtt_walk *walk) -:207: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #207: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2911: + ret = intel_gvt_hypervisor_read_gpa(vgpu, + (pt & PAGE_MASK) + (start_index << info->gtt_entry_size_shift), -:228: CHECK:LINE_SPACING: Please don't use multiple blank lines #228: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2932: + + -:230: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #230: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2934: +static int walk_pd_range(struct intel_vgpu *vgpu, u64 pd, + u64 start, u64 end, struct ppgtt_walk *walk) -:242: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #242: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2946: + ret = intel_gvt_hypervisor_read_gpa(vgpu, + (pd & PAGE_MASK) + (index << -:255: CHECK:LINE_SPACING: Please don't use multiple blank lines #255: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2959: + + -:257: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #257: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2961: +static int walk_pdp_range(struct intel_vgpu *vgpu, u64 pdp, + u64 start, u64 end, struct ppgtt_walk *walk) -:269: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #269: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2973: + ret = intel_gvt_hypervisor_read_gpa(vgpu, + (pdp & PAGE_MASK) + (index << -:281: CHECK:LINE_SPACING: Please don't use multiple blank lines #281: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2985: + + -:283: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #283: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2987: +static int walk_pml4_range(struct intel_vgpu *vgpu, u64 pml4, + u64 start, u64 end, struct ppgtt_walk *walk) -:294: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #294: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2998: + ret = intel_gvt_hypervisor_read_gpa(vgpu, + (pml4 & PAGE_MASK) + (index << -:307: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #307: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3011: +int intel_vgpu_g2v_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]) -:341: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #341: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3045: + walk.mfns = kmalloc_array(num_pages, + sizeof(unsigned long), GFP_KERNEL); -:401: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #401: FILE: drivers/gpu/drm/i915/gvt/gtt.h:281: +int intel_vgpu_g2v_pv_ppgtt_alloc_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]); -:404: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #404: FILE: drivers/gpu/drm/i915/gvt/gtt.h:284: +int intel_vgpu_g2v_pv_ppgtt_clear_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]); -:407: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #407: FILE: drivers/gpu/drm/i915/gvt/gtt.h:287: +int intel_vgpu_g2v_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu, + u64 pdps[]); total: 0 errors, 0 warnings, 22 checks, 388 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
