Some USB type-C dongles requires some time to power on before being able to process aux channel transactions. It was not a problem for older gens because there was a bridge between DP port and USB-C controller adding some delay but ICL handles type-C native. So here trying to do a aux channel transaction at each 150ms for up 5 times, before giving up. Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 14 +++++ drivers/gpu/drm/i915/intel_drv.h | 6 ++- drivers/gpu/drm/i915/intel_hotplug.c | 76 ++++++++++++++++++++++++++++ 4 files changed, 96 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 98547c242121..85950fb1fab1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2792,6 +2792,7 @@ enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv, bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin); void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin); void intel_hpd_suspend(struct drm_i915_private *dev_priv); +void intel_hotplug_tc_wa_work(struct work_struct *__work); /* i915_irq.c */ static inline void i915_queue_hangcheck(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 27c6163426d6..e9060e325109 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5307,6 +5307,7 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) { struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); struct intel_dp *intel_dp = &intel_dig_port->dp; + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp_mst_encoder_cleanup(intel_dig_port); if (intel_dp_is_edp(intel_dp)) { @@ -5323,6 +5324,15 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) unregister_reboot_notifier(&intel_dp->edp_notifier); intel_dp->edp_notifier.notifier_call = NULL; } + } else { + /* + * ICL TC legacy HDMI ports is destroyed by this callback so + * it is necessary check if is DP before cancel delayed works + * as it is not initialized for legacy HDMI ports. + */ + if (IS_ICELAKE(dev_priv) && + intel_dig_port->base.type == INTEL_OUTPUT_DP) + cancel_delayed_work_sync(&intel_dp->tc_wa_work); } intel_dp_aux_fini(intel_dp); @@ -6686,6 +6696,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); } + if (IS_ICELAKE(dev_priv) && !intel_dp_is_edp(intel_dp)) + INIT_DELAYED_WORK(&intel_dp->tc_wa_work, + intel_hotplug_tc_wa_work); + return true; fail: diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index bc30f107b430..61cfa4984c11 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1138,7 +1138,11 @@ struct intel_dp { int panel_power_cycle_delay; int backlight_on_delay; int backlight_off_delay; - struct delayed_work panel_vdd_work; + union { + struct delayed_work panel_vdd_work; + struct delayed_work tc_wa_work; + }; + u8 tc_wa_count; bool want_panel_vdd; unsigned long last_power_on; unsigned long last_backlight_off; diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index 86b7457c6c8d..cfd469bce52c 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c @@ -342,6 +342,64 @@ static void i915_digport_work_func(struct work_struct *work) } } +#define TC_WA_DELAY_MSEC 150 +#define TC_WA_TRIES 5 + +/* + * Test if TC dongle is responsive return true if so otherwise schedule a + * work to try again and return false + */ +static bool intel_hotplug_tc_wa_test(struct intel_dp *intel_dp) +{ + u8 buff; + + intel_dp->tc_wa_count++; + + if (drm_dp_dpcd_read(&intel_dp->aux, DP_DPCD_REV, &buff, 1) != 1) + goto not_responsive; + + if (!drm_probe_ddc(&intel_dp->aux.ddc)) + goto not_responsive; + + return true; + +not_responsive: + if (intel_dp->tc_wa_count < TC_WA_TRIES) { + unsigned long delay; + + delay = msecs_to_jiffies(TC_WA_DELAY_MSEC); + schedule_delayed_work(&intel_dp->tc_wa_work, delay); + } else { + DRM_DEBUG_KMS("TC not responsive, giving up\n"); + } + + return false; +} + +void intel_hotplug_tc_wa_work(struct work_struct *__work) +{ + struct intel_dp *intel_dp = container_of(to_delayed_work(__work), + struct intel_dp, tc_wa_work); + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct intel_encoder *intel_encoder = &intel_dig_port->base; + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct drm_device *dev = &dev_priv->drm; + bool ret; + + if (!intel_digital_port_connected(intel_encoder)) + return; + + mutex_lock(&dev->mode_config.mutex); + ret = intel_hotplug_tc_wa_test(intel_dp); + if (ret) + ret = intel_encoder->hotplug(intel_encoder, intel_connector); + mutex_unlock(&dev->mode_config.mutex); + + if (ret) + drm_kms_helper_hotplug_event(dev); +} + /* * Handle hotplug events outside the interrupt handler proper. */ @@ -377,9 +435,27 @@ static void i915_hotplug_work_func(struct work_struct *work) continue; intel_encoder = intel_connector->encoder; if (hpd_event_bits & (1 << intel_encoder->hpd_pin)) { + struct intel_digital_port *dig_port = enc_to_dig_port(&intel_encoder->base); + DRM_DEBUG_KMS("Connector %s (pin %i) received hotplug event.\n", connector->name, intel_encoder->hpd_pin); + /* + * TC WA: TC dongles can takes some time to be + * responsible, so let's try to do a DPCD read to check + * if it is ready, otherwise try again in a few msecs. + */ + if (IS_ICELAKE(dev_priv) && + intel_digital_port_connected(intel_encoder) && + dig_port->tc_type != TC_PORT_LEGACY) { + struct intel_dp *intel_dp; + + intel_dp = enc_to_intel_dp(&intel_encoder->base); + intel_dp->tc_wa_count = 0; + if (!intel_hotplug_tc_wa_test(intel_dp)) + continue; + } + changed |= intel_encoder->hotplug(intel_encoder, intel_connector); } -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx