== Series Details == Series: series starting with [01/25] RFT drm/i915/execlists: Flush memory before signaling ELSQ URL : https://patchwork.freedesktop.org/series/51967/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3c2ac67a28b1 RFT drm/i915/execlists: Flush memory before signaling ELSQ 56584a72fd4c drm/i915: Mark pin flags as u64 205e8976f453 drm/i915/selftests: Verify we can perform resets from atomic context b08073d933f1 drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start -:18: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #18: References: 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers") -:18: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers")' #18: References: 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers") -:218: ERROR:LOCKING: recursive locking is bad, do not use this ever. #218: FILE: drivers/gpu/drm/i915/i915_gem_userptr.c:108: + switch (mutex_trylock_recursive(m)) { total: 2 errors, 1 warnings, 0 checks, 423 lines checked f20f47b1015e drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture 2923ed57ed23 drm/i915: Always try to reset the GPU on takeover 2d9a8ac97df8 drm/i915: Cache the error string 667a844f59fc drm/i915: Report the number of closed vma held by each context in debugfs -:61: WARNING:LONG_LINE: line over 100 characters #61: FILE: drivers/gpu/drm/i915/i915_debugfs.c:348: + seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu inactive, %llu global, %llu shared, %llu unbound, %llu closed)\n", \ total: 0 errors, 1 warnings, 0 checks, 201 lines checked 48e4d4241dd5 drm/i915: Remove debugfs/i915_ppgtt_info 1d46ffa2bdf5 drm/i915: Track all held rpm wakerefs -:105: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment #105: FILE: drivers/gpu/drm/i915/i915_drv.h:1302: + spinlock_t debug_lock; total: 0 errors, 0 warnings, 1 checks, 571 lines checked d55c94ebeea6 drm/i915: Markup paired operations on wakerefs -:748: WARNING:NEW_TYPEDEFS: do not add new typedefs #748: FILE: drivers/gpu/drm/i915/i915_drv.h:131: +typedef depot_stack_handle_t intel_wakeref_t; total: 0 errors, 1 warnings, 0 checks, 2392 lines checked e8a2eadf80a5 drm/i915: Syntatic sugar for using intel_runtime_pm -:509: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #509: FILE: drivers/gpu/drm/i915/intel_drv.h:2159: +#define with_intel_runtime_pm(i915, wf) \ + for (wf = intel_runtime_pm_get(i915); wf; \ + intel_runtime_pm_put(i915, wf), wf = 0) -:509: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects? #509: FILE: drivers/gpu/drm/i915/intel_drv.h:2159: +#define with_intel_runtime_pm(i915, wf) \ + for (wf = intel_runtime_pm_get(i915); wf; \ + intel_runtime_pm_put(i915, wf), wf = 0) -:513: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #513: FILE: drivers/gpu/drm/i915/intel_drv.h:2163: +#define with_intel_runtime_pm_if_in_use(i915, wf) \ + for (wf = intel_runtime_pm_get_if_in_use(i915); wf; \ + intel_runtime_pm_put(i915, wf), wf = 0) -:513: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects? #513: FILE: drivers/gpu/drm/i915/intel_drv.h:2163: +#define with_intel_runtime_pm_if_in_use(i915, wf) \ + for (wf = intel_runtime_pm_get_if_in_use(i915); wf; \ + intel_runtime_pm_put(i915, wf), wf = 0) total: 0 errors, 0 warnings, 4 checks, 710 lines checked ba7cf10bf44b drm/i915: Markup paired operations on display power domains acacd8bf9a68 drm/i915: Track the wakeref used to initialise display power domains -:213: WARNING:LINE_SPACING: Missing a blank line after declarations #213: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:4185: + struct i915_power_domains *power_domains = &i915->power_domains; + intel_wakeref_t wakeref __maybe_unused = total: 0 errors, 1 warnings, 0 checks, 326 lines checked c246ed85f300 drm/i915: Combined gt.awake/gt.power wakerefs ea9d6edd2f9c drm/i915/dp: Markup pps lock power well -:57: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dp' - possible side-effects? #57: FILE: drivers/gpu/drm/i915/intel_dp.c:763: +#define with_pps_lock(dp, wf) \ + for (wf = pps_lock(dp); wf; wf = pps_unlock(dp, wf)) -:57: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects? #57: FILE: drivers/gpu/drm/i915/intel_dp.c:763: +#define with_pps_lock(dp, wf) \ + for (wf = pps_lock(dp); wf; wf = pps_unlock(dp, wf)) total: 0 errors, 0 warnings, 2 checks, 430 lines checked 1b556cf4dc1c drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice 9d91b6ea86d6 drm/i915: Mark up Ironlake ips with rpm wakerefs -:210: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided #210: FILE: drivers/gpu/drm/i915/intel_pm.c:8101: + chipset_val = graphics_val = 0; total: 0 errors, 0 warnings, 1 checks, 318 lines checked 874b6ac99579 drm/i915: Serialise concurrent calls to i915_gem_set_wedged() -:48: WARNING:MEMORY_BARRIER: memory barrier without comment #48: FILE: drivers/gpu/drm/i915/i915_gem.c:3399: + smp_mb__before_atomic(); total: 0 errors, 1 warnings, 0 checks, 107 lines checked c1c98db439eb drm/i915: Differentiate between ggtt->mutex and ppgtt->mutex d46f7fd9bd61 drm/i915: Pull all the reset functionality together into i915_reset.c -:1124: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #1124: new file mode 100644 -:1129: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #1129: FILE: drivers/gpu/drm/i915/i915_reset.c:1: +/* -:1273: WARNING:TYPO_SPELLING: 'acknowledgement' may be misspelled - perhaps 'acknowledgment'? #1273: FILE: drivers/gpu/drm/i915/i915_reset.c:145: + /* Assert reset for at least 20 usec, and wait for acknowledgement. */ -:1933: WARNING:MEMORY_BARRIER: memory barrier without comment #1933: FILE: drivers/gpu/drm/i915/i915_reset.c:805: + smp_mb__before_atomic(); -:2257: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'W' - possible side-effects? #2257: FILE: drivers/gpu/drm/i915/i915_reset.c:1129: +#define i915_wedge_on_timeout(W, DEV, TIMEOUT) \ + for (__init_wedge((W), (DEV), (TIMEOUT), __func__); \ + (W)->i915; \ + __fini_wedge((W))) -:2268: WARNING:STATIC_CONST_CHAR_ARRAY: char * array declaration might be better as static const #2268: FILE: drivers/gpu/drm/i915/i915_reset.c:1140: + char *error_event[] = { I915_ERROR_UEVENT "=1", NULL }; -:2269: WARNING:STATIC_CONST_CHAR_ARRAY: char * array declaration might be better as static const #2269: FILE: drivers/gpu/drm/i915/i915_reset.c:1141: + char *reset_event[] = { I915_RESET_UEVENT "=1", NULL }; -:2270: WARNING:STATIC_CONST_CHAR_ARRAY: char * array declaration might be better as static const #2270: FILE: drivers/gpu/drm/i915/i915_reset.c:1142: + char *reset_done_event[] = { I915_ERROR_UEVENT "=0", NULL }; -:2466: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #2466: FILE: drivers/gpu/drm/i915/i915_reset.h:1: +/* total: 0 errors, 8 warnings, 1 checks, 2968 lines checked c2e14acbe955 drm/i915: Make all GPU resets atomic -:23: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt #23: FILE: drivers/gpu/drm/i915/i915_reset.c:147: + udelay(50); -:29: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt #29: FILE: drivers/gpu/drm/i915/i915_reset.c:152: + udelay(50); total: 0 errors, 0 warnings, 2 checks, 111 lines checked 875229697371 drm/i915/guc: Disable global reset 446dbe1cc3c0 drm/i915: Perform device reset under stop-machine 09dab363cfd3 drm/i915: Remove GPU reset dependence on struct_mutex -:590: WARNING:MEMORY_BARRIER: memory barrier without comment #590: FILE: drivers/gpu/drm/i915/i915_reset.c:587: + smp_store_mb(i915->gpu_error.restart, NULL); total: 0 errors, 1 warnings, 0 checks, 1229 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
