> -----Original Message----- > From: Nikula, Jani > Sent: Thursday, November 1, 2018 9:04 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Chauhan, Madhav <madhav.chauhan@xxxxxxxxx>; > ville.syrjala@xxxxxxxxxxxxxxx; Kulkarni, Vandita <vandita.kulkarni@xxxxxxxxx>; > Lisovskiy, Stanislav <stanislav.lisovskiy@xxxxxxxxx>; Nikula, Jani > <jani.nikula@xxxxxxxxx> > Subject: [PATCH v9 04/15] drm/i915/icl: Add get config functionality for DSI > > From: Madhav Chauhan <madhav.chauhan@xxxxxxxxx> > > This patch implements the functionality for getting PIPE configuration to which > DSI encoder is connected. Used during the atomic modeset. > > Signed-off-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx> > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/icl_dsi.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index > 806b8c323b53..b47e837f4493 100644 > --- a/drivers/gpu/drm/i915/icl_dsi.c > +++ b/drivers/gpu/drm/i915/icl_dsi.c > @@ -1055,6 +1055,19 @@ static void gen11_dsi_disable(struct intel_encoder > *encoder, > gen11_dsi_disable_io_power(encoder); > } > > +static void gen11_dsi_get_config(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config) { > + struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, > + base); > + u32 pixel_clk; > + > + //FIXME: Calculate pixel clock using PLL functions once implemented. > + pixel_clk = intel_dsi->pclk; > + pipe_config->base.adjusted_mode.crtc_clock = pixel_clk; > + pipe_config->port_clock = pixel_clk; Is this Ok for now, or should I continue on the lines that Ville suggested? Thanks, Vandita > +} > + > static void gen11_dsi_encoder_destroy(struct drm_encoder *encoder) { > intel_encoder_destroy(encoder); > @@ -1167,6 +1180,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) > encoder->pre_enable = gen11_dsi_pre_enable; > encoder->disable = gen11_dsi_disable; > encoder->port = port; > + encoder->get_config = gen11_dsi_get_config; > encoder->type = INTEL_OUTPUT_DSI; > encoder->cloneable = 0; > encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); > -- > 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx