On Tue, Oct 30, 2018 at 02:55:00PM -0700, Manasi Navare wrote: > On Tue, Oct 30, 2018 at 09:05:57PM +0200, Imre Deak wrote: > > For DDI/TypeC ports the AUX power domain needs to be enabled before the > > port's PLL is enabled, so move the enabling earlier accordingly. > > > > v2: > > - Preserve the pre_pll hook for GEN9_LP. (Ville) > > > > Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_ddi.c | 60 +++++++++++++++++++++--------------- > > drivers/gpu/drm/i915/intel_display.c | 2 ++ > > 2 files changed, 37 insertions(+), 25 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > > index 5bb459011a49..9554da06e19a 100644 > > --- a/drivers/gpu/drm/i915/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/intel_ddi.c > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, > > } > > > > static inline enum intel_display_power_domain > > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) > > +intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port) > > { > > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > > - > > /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with > > * DC states enabled at the same time, while for driver initiated AUX > > * transfers we need the same AUX IOs to be powered but with DC states > > @@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder, > > domains = BIT_ULL(dig_port->ddi_io_power_domain); > > > > /* AUX power is only needed for (e)DP mode, not for HDMI. */ > > - if (intel_crtc_has_dp_encoder(crtc_state)) { > > - struct intel_dp *intel_dp = &dig_port->dp; > > - > > - domains |= BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp)); > > - } > > + if (intel_crtc_has_dp_encoder(crtc_state)) > > + domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port)); > > > > return domains; > > } > > @@ -2891,6 +2886,36 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder) > > } > > } > > > > I just realized while merging that my previous patches that are reviewed-by > add icl_ddi_pre_pll_enable hook for Gen 11. > Either the below pre_pll_enable should be part of that or I will have to respin those > before merging and call it intel_ddi_pre_pll_enable() hook. > https://patchwork.freedesktop.org/patch/258008/ I'm fine with merging either patchset first, it's a simple rebase in both cases. > > Manasi > > > +static void > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder, > > + const struct intel_crtc_state *crtc_state, > > + const struct drm_connector_state *conn_state) > > +{ > > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > + struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); > > + > > + if (intel_crtc_has_dp_encoder(crtc_state)) > > + intel_display_power_get(dev_priv, > > + intel_ddi_main_link_aux_domain(dig_port)); > > + > > + if (IS_GEN9_LP(dev_priv)) > > + bxt_ddi_phy_set_lane_optim_mask(encoder, > > + crtc_state->lane_lat_optim_mask); > > +} > > + > > +static void > > +intel_ddi_post_pll_disable(struct intel_encoder *encoder, > > + const struct intel_crtc_state *crtc_state, > > + const struct drm_connector_state *conn_state) > > +{ > > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > + struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); > > + > > + if (intel_crtc_has_dp_encoder(crtc_state)) > > + intel_display_power_put(dev_priv, > > + intel_ddi_main_link_aux_domain(dig_port)); > > +} > > + > > static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, > > const struct intel_crtc_state *crtc_state, > > const struct drm_connector_state *conn_state) > > @@ -2904,9 +2929,6 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, > > > > WARN_ON(is_mst && (port == PORT_A || port == PORT_E)); > > > > - intel_display_power_get(dev_priv, > > - intel_ddi_main_link_aux_domain(intel_dp)); > > - > > intel_dp_set_link_params(intel_dp, crtc_state->port_clock, > > crtc_state->lane_count, is_mst); > > > > @@ -3071,9 +3093,6 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, > > intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain); > > > > intel_ddi_clk_disable(encoder); > > - > > - intel_display_power_put(dev_priv, > > - intel_ddi_main_link_aux_domain(intel_dp)); > > } > > > > static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder, > > @@ -3304,15 +3323,6 @@ static void intel_disable_ddi(struct intel_encoder *encoder, > > intel_disable_ddi_dp(encoder, old_crtc_state, old_conn_state); > > } > > > > -static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder, > > - const struct intel_crtc_state *pipe_config, > > - const struct drm_connector_state *conn_state) > > -{ > > - uint8_t mask = pipe_config->lane_lat_optim_mask; > > - > > - bxt_ddi_phy_set_lane_optim_mask(encoder, mask); > > -} > > - > > void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp) > > { > > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > > @@ -3828,8 +3838,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) > > intel_encoder->compute_output_type = intel_ddi_compute_output_type; > > intel_encoder->compute_config = intel_ddi_compute_config; > > intel_encoder->enable = intel_enable_ddi; > > - if (IS_GEN9_LP(dev_priv)) > > - intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable; > > + intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable; > > + intel_encoder->post_pll_disable = intel_ddi_post_pll_disable; > > intel_encoder->pre_enable = intel_ddi_pre_enable; > > intel_encoder->disable = intel_disable_ddi; > > intel_encoder->post_disable = intel_ddi_post_disable; > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 36710a30fb37..12ba2b923e6b 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, > > > > if (INTEL_GEN(dev_priv) >= 11) > > icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state); > > + > > + intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state); > > } > > > > static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state) > > -- > > 2.13.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx