Re: [PATCH] drm/i915/selftest: fix 64K alignment in igt_write_huge

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Hi Matthew,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.19 next-20181030]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Matthew-Auld/drm-i915-selftest-fix-64K-alignment-in-igt_write_huge/20181030-034107
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All warnings (new ones prefixed by >>):

   In file included from drivers/gpu/drm/i915/i915_gem.c:6238:0:
   drivers/gpu/drm/i915/selftests/huge_pages.c: In function 'igt_write_huge':
>> drivers/gpu/drm/i915/selftests/huge_pages.c:1132:72: warning: comparison of distinct pointer types lacks a cast
      alignment = max(alignment, I915_GTT_PAGE_SIZE_2M);
                                                                           ^ 

vim +1132 drivers/gpu/drm/i915/selftests/huge_pages.c

  1106	
  1107	static int igt_write_huge(struct i915_gem_context *ctx,
  1108				  struct drm_i915_gem_object *obj)
  1109	{
  1110		struct drm_i915_private *i915 = to_i915(obj->base.dev);
  1111		struct i915_address_space *vm =
  1112			ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
  1113		static struct intel_engine_cs *engines[I915_NUM_ENGINES];
  1114		struct intel_engine_cs *engine;
  1115		I915_RND_STATE(prng);
  1116		IGT_TIMEOUT(end_time);
  1117		unsigned int id;
  1118		u64 alignment;
  1119		u64 max;
  1120		u64 num;
  1121		u64 size;
  1122		int *order;
  1123		int i, n;
  1124		int err = 0;
  1125	
  1126		GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
  1127	
  1128		size = obj->base.size;
  1129		alignment = rounddown_pow_of_two(obj->mm.page_sizes.sg);
  1130		if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
  1131			size = round_up(size, I915_GTT_PAGE_SIZE_2M);
> 1132			alignment = max(alignment, I915_GTT_PAGE_SIZE_2M);
  1133		}
  1134	
  1135		max = div_u64((vm->total - size), alignment);
  1136	
  1137		n = 0;
  1138		for_each_engine(engine, i915, id) {
  1139			if (!intel_engine_can_store_dword(engine)) {
  1140				pr_info("store-dword-imm not supported on engine=%u\n",
  1141					id);
  1142				continue;
  1143			}
  1144			engines[n++] = engine;
  1145		}
  1146	
  1147		if (!n)
  1148			return 0;
  1149	
  1150		/*
  1151		 * To keep things interesting when alternating between engines in our
  1152		 * randomized order, lets also make feeding to the same engine a few
  1153		 * times in succession a possibility by enlarging the permutation array.
  1154		 */
  1155		order = i915_random_order(n * I915_NUM_ENGINES, &prng);
  1156		if (!order)
  1157			return -ENOMEM;
  1158	
  1159		/*
  1160		 * Try various offsets in an ascending/descending fashion until we
  1161		 * timeout -- we want to avoid issues hidden by effectively always using
  1162		 * offset = 0.
  1163		 */
  1164		i = 0;
  1165		for_each_prime_number_from(num, 0, max) {
  1166			u64 offset_low = num * alignment;
  1167			u64 offset_high = (max - num) * alignment;
  1168			u32 dword = offset_in_page(num) / 4;
  1169	
  1170			engine = engines[order[i] % n];
  1171			i = (i + 1) % (n * I915_NUM_ENGINES);
  1172	
  1173			err = __igt_write_huge(ctx, engine, obj, size, offset_low,
  1174					       dword, num + 1);
  1175			if (err)
  1176				break;
  1177	
  1178			err = __igt_write_huge(ctx, engine, obj, size, offset_high,
  1179					       dword, num + 1);
  1180			if (err)
  1181				break;
  1182	
  1183			if (igt_timeout(end_time,
  1184					"%s timed out on engine=%u, offset_low=%llx offset_high=%llx, max_page_size=%lx\n",
  1185					__func__, engine->id, offset_low, offset_high,
  1186					rounddown_pow_of_two(obj->mm.page_sizes.sg)))
  1187				break;
  1188		}
  1189	
  1190		kfree(order);
  1191	
  1192		return err;
  1193	}
  1194	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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