Quoting Radhakrishna Sripada (2018-10-30 08:45:04) > From: Oscar Mateo <oscar.mateo@xxxxxxxxx> > > Required for Bindless samplers. > Userspace consumer: mesa > > V2: Rebase > V3: Update commit message > > Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index f76fa13a12a2..050fedb4fc81 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -8648,6 +8648,8 @@ enum { > #define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080) > #define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7) > > +#define GEN10_SAMPLER_MODE _MMIO(0xE18C) > + > /* IVYBRIDGE DPF */ > #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */ > #define GEN7_L3CDERRST1_ROW_MASK (0x7ff << 14) > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c > index 896874278852..d7176213e3ce 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -1018,6 +1018,9 @@ static void icl_whitelist_build(struct whitelist *w) > { > /* WaAllowUMDToModifyHalfSliceChicken7:icl */ > whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7); > + > + /* WaAllowUMDToModifySamplerMode:icl */ > + whitelist_reg(w, GEN10_SAMPLER_MODE); Hmm, we need the basic subtests of gem_workarounds in BAT to have any coverage of this code. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx