On Fri, Oct 26, 2018 at 03:45:04PM -0400, Sean Paul wrote: > From: Sean Paul <seanpaul@xxxxxxxxxxxx> > > Noticed this while reading the comments, s/defesive/defensive/ > > Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 4bd5768731ee..562718cbb198 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -748,7 +748,7 @@ int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state) > /* > * Max time for PSR to idle = Inverse of the refresh rate + > * 6 ms of exit training time + 1.5 ms of aux channel > - * handshake. 50 msec is defesive enough to cover everything. > + * handshake. 50 msec is defensive enough to cover everything. > */ > return intel_wait_for_register(dev_priv, reg, mask, > EDP_PSR_STATUS_STATE_IDLE, 50); > -- > Sean Paul, Software Engineer, Google / Chromium OS > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
