== Series Details == Series: Enable Plane Input CSC for ICL (rev3) URL : https://patchwork.freedesktop.org/series/51463/ State : warning == Summary == $ dim checkpatch origin/drm-tip 99febf0a6212 drm/i915/icl: Define Plane Input CSC Coefficient Registers -:54: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #54: FILE: drivers/gpu/drm/i915/i915_reg.h:6603: +#define PLANE_INPUT_CSC_COEFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_RY_GY_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_RY_GY_2(pipe) + (index) * 4) -:54: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #54: FILE: drivers/gpu/drm/i915/i915_reg.h:6603: +#define PLANE_INPUT_CSC_COEFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_RY_GY_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_RY_GY_2(pipe) + (index) * 4) -:70: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #70: FILE: drivers/gpu/drm/i915/i915_reg.h:6619: +#define PLANE_INPUT_CSC_PREOFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_PREOFF_HI_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_PREOFF_HI_2(pipe) + (index) * 4) -:70: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #70: FILE: drivers/gpu/drm/i915/i915_reg.h:6619: +#define PLANE_INPUT_CSC_PREOFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_PREOFF_HI_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_PREOFF_HI_2(pipe) + (index) * 4) -:86: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects? #86: FILE: drivers/gpu/drm/i915/i915_reg.h:6635: +#define PLANE_INPUT_CSC_POSTOFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_POSTOFF_HI_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_POSTOFF_HI_2(pipe) + (index) * 4) -:86: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'index' - possible side-effects? #86: FILE: drivers/gpu/drm/i915/i915_reg.h:6635: +#define PLANE_INPUT_CSC_POSTOFF_REG(pipe, plane, index) \ + _MMIO_PLANE(plane, _PLANE_INPUT_CSC_POSTOFF_HI_1(pipe) + (index) * 4, \ + _PLANE_INPUT_CSC_POSTOFF_HI_2(pipe) + (index) * 4) total: 0 errors, 0 warnings, 6 checks, 62 lines checked ca48ad67d283 drm/i915/icl: Enable Plane Input CSC for YUV to RGB Conversion _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
