On Wed, Oct 24, 2018 at 03:28:30PM -0700, Manasi Navare wrote:
> From: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
>
> This patch enables decompression support in sink device
> before link training and disables the same during the
> DDI disabling.
>
> v2:(From Manasi)
> * Change the enable/disable function to take crtc_state
> instead of intel_dp as an argument (Manasi)
> * Use the compression_enable flag as part of crtc_state (Manasi)
>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
> Cc: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 5 +++++
> drivers/gpu/drm/i915/intel_dp.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 3 +++
> 3 files changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index e40a8c97d34b..1de0a3917d7f 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2930,6 +2930,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> intel_ddi_init_dp_buf_reg(encoder);
> if (!is_mst)
> intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> + intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
> + DP_DECOMPRESSION_EN);
> intel_dp_start_link_train(intel_dp);
> if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
> intel_dp_stop_link_train(intel_dp);
> @@ -3272,6 +3274,9 @@ static void intel_disable_ddi_dp(struct intel_encoder *encoder,
> intel_edp_drrs_disable(intel_dp, old_crtc_state);
> intel_psr_disable(intel_dp, old_crtc_state);
> intel_edp_backlight_off(old_conn_state);
> + /* Disable the decompression in DP Sink */
> + intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> + ~DP_DECOMPRESSION_EN);
That looks suspicious.
I can't figure out what value you're actually passing here since I
can't find the definiiton of DP_DECOMPRESSION_EN anywhere.
> }
>
> static void intel_disable_ddi_hdmi(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 35162c3bc811..72e6605f0ed7 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3005,6 +3005,21 @@ static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp)
> intel_dp->downstream_ports[0] & DP_DS_PORT_HPD;
> }
>
> +void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + int state)
> +{
> + int ret;
> +
> + if (!crtc_state->dsc_params.compression_enable)
> + return;
> +
> + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE, state);
> + if (ret < 0)
> + DRM_DEBUG_KMS("Failed to %s sink decompression state\n",
> + state == DP_DECOMPRESSION_EN ? "enable" : "disable");
> +}
> +
> /* If the sink supports it, try to set the power state appropriately */
> void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
> {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index c4be4ba7adac..4f5d17bcd54e 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1786,6 +1786,9 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
> int intel_dp_retrain_link(struct intel_encoder *encoder,
> struct drm_modeset_acquire_ctx *ctx);
> void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
> +void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + int state);
> void intel_dp_encoder_reset(struct drm_encoder *encoder);
> void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> --
> 2.18.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
