On Tue, Oct 23, 2018 at 04:39:13PM +0530, Vandita Kulkarni wrote:
> From: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>
>
> This patch calculate various DPLL dividers and
> parameters for DSI encoder and adjust AFE clock
> for DSI. For DSI, 8x clock is AFE clock.
>
> v2: Extend haswell_crtc_compute_clock() for Gen11 DSI
>
> v3: Rebase
>
> v4: use port clock instead of bitrate.
>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 ++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index fc7e3b0..ddbba92 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9250,10 +9250,12 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv)
> static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state)
> {
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct intel_atomic_state *state =
> to_intel_atomic_state(crtc_state->base.state);
>
> - if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) {
> + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
> + IS_ICELAKE(dev_priv)) {
> struct intel_encoder *encoder =
> intel_get_crtc_new_encoder(state, crtc_state);
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 7bdff5b..f31acf1 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2525,6 +2525,8 @@ static bool icl_calc_dpll_state(struct intel_crtc_state *crtc_state,
> ret = icl_calc_tbt_pll(dev_priv, clock, &pll_params);
> else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> ret = cnl_ddi_calculate_wrpll(clock, dev_priv, &pll_params);
> + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> + ret = cnl_ddi_calculate_wrpll(clock/5, dev_priv, &pll_params);
That /5 could be eliminated in .compute_config(). Not that we seem to
have a full .compute_config() yet.
> else
> ret = icl_calc_dp_combo_pll(dev_priv, clock, &pll_params);
>
> --
> 1.9.1
--
Ville Syrjälä
Intel
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