On Tue, Oct 23, 2018 at 04:39:14PM +0530, Vandita Kulkarni wrote:
> From: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>
>
> This patch implements the functionality for getting PIPE
> configuration to which DSI encoder is connected. Used during
> the atomic modeset.
>
> v2: use intel_dsi_bitrate instead of intel_dsi->pclk
>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/icl_dsi.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
> index d2bb369..6cb3bf8 100644
> --- a/drivers/gpu/drm/i915/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/icl_dsi.c
> @@ -665,3 +665,16 @@ static void __attribute__((unused))
> /* step6d: enable dsi transcoder */
> gen11_dsi_enable_transcoder(encoder);
> }
> +
> +static void __attribute__((unused))
> +gen11_dsi_get_config(struct intel_encoder *encoder,
> + struct intel_crtc_state *pipe_config)
> +{
> + struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
> + base);
> + u32 pixel_clk;
> +
> + pixel_clk = intel_dsi_bitrate(intel_dsi);
> + pipe_config->base.adjusted_mode.crtc_clock = pixel_clk;
> + pipe_config->port_clock = pixel_clk;
We're supposed to read the state from the hardware here. See how other
DDI encoders do it.
> +}
> --
> 1.9.1
--
Ville Syrjälä
Intel
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