Now that we have the number of ddi ports information available let's use it instead of that ugly platform macro. v2: - Don't override platform info (Jani) But use platform info (Daniel) - Don't use ddi_ports when it doesn't make sense (Lucas) - Add a comment to let clear that port E is fused off. (Rodrigo) Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 2 -- drivers/gpu/drm/i915/i915_irq.c | 5 ++--- drivers/gpu/drm/i915/i915_pci.c | 8 ++++++++ drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- include/drm/i915_pciids.h | 4 +++- 6 files changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7ad232849268..99e42df79ed8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2485,8 +2485,6 @@ intel_info(const struct drm_i915_private *dev_priv) (dev_priv)->info.gt == 2) #define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \ (dev_priv)->info.gt == 3) -#define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \ - (INTEL_DEVID(dev_priv) & 0x0004) == 0x0004) #define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5d1f53723388..63d676de3840 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2782,8 +2782,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) if (INTEL_GEN(dev_priv) >= 11) tmp_mask |= ICL_AUX_CHANNEL_E; - if (IS_CNL_WITH_PORT_F(dev_priv) || - INTEL_GEN(dev_priv) >= 11) + if (INTEL_INFO(dev_priv)->ddi_ports >= 6) tmp_mask |= CNL_AUX_CHANNEL_F; if (iir & tmp_mask) { @@ -4220,7 +4219,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) if (INTEL_GEN(dev_priv) >= 11) de_port_masked |= ICL_AUX_CHANNEL_E; - if (IS_CNL_WITH_PORT_F(dev_priv) || INTEL_GEN(dev_priv) >= 11) + if (INTEL_INFO(dev_priv)->ddi_ports >= 6) de_port_masked |= CNL_AUX_CHANNEL_F; de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK | diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 0427486f63d0..dc78daca145f 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -593,6 +593,13 @@ static const struct intel_device_info intel_cannonlake_info = { .gt = 2, }; +static const struct intel_device_info intel_cannonlake_portf_info = { + GEN10_FEATURES, + PLATFORM(INTEL_CANNONLAKE), + .gt = 2, + .ddi_ports = 6, /* Although port E is fused off, full port F is added */ +}; + #define GEN11_FEATURES \ GEN10_FEATURES, \ GEN(11), \ @@ -672,6 +679,7 @@ static const struct pci_device_id pciidlist[] = { INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_CNL_IDS(&intel_cannonlake_info), + INTEL_CNL_PORTF_IDS(&intel_cannonlake_portf_info), INTEL_ICL_11_IDS(&intel_icelake_11_info), {0, 0, 0} }; diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3384a9bbdafd..0ea0414ccef4 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -402,7 +402,7 @@ static int cnl_max_source_rate(struct intel_dp *intel_dp) return 540000; /* For this SKU 8.1G is supported in all ports */ - if (IS_CNL_WITH_PORT_F(dev_priv)) + if (INTEL_INFO(dev_priv)->ddi_ports == 6) return 810000; /* For other SKUs, max rate on ports A and D is 5.4G */ diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 31a49bdcf193..80e14be11279 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3099,7 +3099,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) * timeouts, lets remove them from the list * for the SKUs without port F. */ - if (!IS_CNL_WITH_PORT_F(dev_priv)) + if (INTEL_INFO(dev_priv)->ddi_ports == 5) power_domains->power_well_count -= 2; } else if (IS_BROXTON(dev_priv)) { diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 192667144693..486822205151 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -445,7 +445,9 @@ INTEL_VGA_DEVICE(0x5A42, info), \ INTEL_VGA_DEVICE(0x5A4A, info), \ INTEL_VGA_DEVICE(0x5A50, info), \ - INTEL_VGA_DEVICE(0x5A40, info), \ + INTEL_VGA_DEVICE(0x5A40, info) + +#define INTEL_CNL_PORTF_IDS(info) \ INTEL_VGA_DEVICE(0x5A54, info), \ INTEL_VGA_DEVICE(0x5A5C, info), \ INTEL_VGA_DEVICE(0x5A44, info), \ -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx