On Tue, 2 Oct 2018 at 15:07, Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> wrote: > > All other master control register bits, except the enable, > are read only and they are level indications of the second > level interrupt status. Only touch enable bit and rectify > the comment. > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Reviewed-by: Matthew Auld <matthew.auld@xxxxxxxxx> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
