On Mon, 2018-10-08 at 15:43 -0700, Dhinakaran Pandiyan wrote:
> On Fri, 2018-10-05 at 16:35 -0700, José Roberto de Souza wrote:
> > It should always wait for idle state when disabling PSR because PSR
> > could be inactive due a call to intel_psr_exit() and while PSR is
> > still being disabled asynchronously userspace could change the
> > modeset causing a call to psr_disable() that will not wait for PSR
> > idle and then PSR will be enabled again while PSR is still not
> > idle.
> Agreed.
>
> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 43 +++++++++++++++-------------
> > --
> > --
> > 1 file changed, 20 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 423cdf84059c..cd9a60d1efa1 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -661,40 +661,37 @@ static void
> > intel_psr_disable_source(struct intel_dp *intel_dp)
> > {
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > + i915_reg_t psr_status;
> > + u32 psr_status_mask;
> >
> > if (dev_priv->psr.active) {
> > - i915_reg_t psr_status;
> > - u32 psr_status_mask;
> > -
> > - if (dev_priv->psr.psr2_enabled) {
> > - psr_status = EDP_PSR2_STATUS;
> > - psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
> > -
> > + if (dev_priv->psr.psr2_enabled)
> > I915_WRITE(EDP_PSR2_CTL,
> > - I915_READ(EDP_PSR2_CTL) &
> > - ~(EDP_PSR2_ENABLE |
> > EDP_SU_TRACK_ENABLE));
> > -
> > - } else {
> > - psr_status = EDP_PSR_STATUS;
> > - psr_status_mask = EDP_PSR_STATUS_STATE_MASK;
> > -
> > + I915_READ(EDP_PSR2_CTL) &
> > ~EDP_PSR2_ENABLE);
>
> Is there a way to reuse psr_exit() and move rest of the stuff to the
> caller? We won't not need disable_source() if that can be done?
We could move to the caller and reuse psr_exit(), I will do that in
another patch.
>
>
>
> > + else
> > I915_WRITE(EDP_PSR_CTL,
> > I915_READ(EDP_PSR_CTL) &
> > ~EDP_PSR_ENABLE);
> > - }
> > -
> > - /* Wait till PSR is idle */
> > - if (intel_wait_for_register(dev_priv,
> > - psr_status,
> > psr_status_mask, 0,
> > - 2000))
> > - DRM_ERROR("Timed out waiting for PSR Idle
> > State\n");
> > -
> > - dev_priv->psr.active = false;
> > } else {
> > if (dev_priv->psr.psr2_enabled)
> > WARN_ON(I915_READ(EDP_PSR2_CTL) &
> > EDP_PSR2_ENABLE);
> > else
> > WARN_ON(I915_READ(EDP_PSR_CTL) &
> > EDP_PSR_ENABLE);
> > }
> > +
> > + if (dev_priv->psr.psr2_enabled) {
> > + psr_status = EDP_PSR2_STATUS;
> > + psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
> > + } else {
> > + psr_status = EDP_PSR_STATUS;
> > + psr_status_mask = EDP_PSR_STATUS_STATE_MASK;
> > + }
> > +
> > + /* Wait till PSR is idle */
> > + if (intel_wait_for_register(dev_priv, psr_status,
> > psr_status_mask, 0,
> > + 2000))
> > + DRM_ERROR("Timed out waiting for PSR Idle State\n");
> > +
> > + dev_priv->psr.active = false;
> > }
> >
> > static void intel_psr_disable_locked(struct intel_dp *intel_dp)
>
>
>
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