== Series Details == Series: Display Stream Compression enabling on eDP/DP (rev5) URL : https://patchwork.freedesktop.org/series/47514/ State : warning == Summary == $ dim checkpatch origin/drm-tip f0a2fb715544 drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming f58388d95d62 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT 6d04d97a2398 drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init bfdecf2dc03b drm/dp: DRM DP helper/macros to get DP sink DSC parameters b7b131dde493 drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC -:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #27: * rename it as SMALL_JOINER since we are not enabling big joiner yet (Anusha) total: 0 errors, 1 warnings, 0 checks, 132 lines checked eb37babb198f drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported 423a3126657c drm/dp: Define payload size for DP SDP PPS packet cf5d8f25d9a3 drm/dsc: Define Display Stream Compression PPS infoframe -:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #27: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 347 lines checked ed145dd80208 drm/dsc: Define VESA Display Stream Compression Capabilities -:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #34: Co-developed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> -:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #73: FILE: include/drm/drm_dsc.h:40: + bool convert_rgb; -:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #83: FILE: include/drm/drm_dsc.h:50: + bool enable422; -:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #108: FILE: include/drm/drm_dsc.h:75: + bool block_pred_enable; -:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #136: FILE: include/drm/drm_dsc.h:103: + bool vbr_enable; -:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #151: FILE: include/drm/drm_dsc.h:118: + bool native_422; -:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #153: FILE: include/drm/drm_dsc.h:120: + bool native_420; total: 0 errors, 1 warnings, 6 checks, 121 lines checked a5d4c8c5cbf2 drm/dsc: Define Rate Control values that do not change over configurations -:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx>' total: 0 errors, 1 warnings, 0 checks, 12 lines checked 3a01d6ad7d7a drm/dsc: Add helpers for DSC picture parameter set infoframes -:23: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #23: * Add reference to added kernel-docs in Documentation/gpu/drm-kms-helpers.rst -:74: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #74: new file mode 100644 total: 0 errors, 2 warnings, 0 checks, 287 lines checked 44847e209caf drm/i915/dp: Add DSC params and DSC config to intel_crtc_state -:46: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #46: FILE: drivers/gpu/drm/i915/intel_drv.h:907: + bool compression_enable; -:47: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #47: FILE: drivers/gpu/drm/i915/intel_drv.h:908: + bool dsc_split; total: 0 errors, 0 warnings, 2 checks, 22 lines checked e787d64e456e drm/i915/dp: Compute DSC pipe config in atomic check 2ac87eee4715 drm/i915/dp: Do not enable PSR2 if DSC is enabled 3341aaf29568 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants a3b30949f4db drm/i915/dsc: Define & Compute VESA DSC params -:65: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by: #65: Co-developed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> -:91: WARNING:MISSING_SPACE: break quoted strings at a space character #91: FILE: drivers/gpu/drm/i915/intel_dp.c:2078: + DRM_ERROR("Cannot compute valid DSC parameters for Input Bpp = %d" + "Compressed BPP = %d\n", -:115: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #115: new file mode 100644 -:401: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #401: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282: +} +}; total: 0 errors, 3 warnings, 1 checks, 496 lines checked 7c2422670f1d drm/i915/dsc: Compute Rate Control parameters for DSC -:134: CHECK:SPACING: space preferred before that '*' (ctx:VxE) #134: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411: + vdsc_cfg->slice_bpg_offset)* ^ -:166: CHECK:LINE_SPACING: Please don't use multiple blank lines #166: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443: + + total: 0 errors, 0 warnings, 2 checks, 138 lines checked ea1eee8724a0 drm/i915/dp: Enable/Disable DSC in DP Sink 1123bd490e53 drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI e6e4315ae809 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling -:35: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #35: FILE: drivers/gpu/drm/i915/i915_drv.h:3510: +extern void intel_dsc_enable(struct intel_encoder *encoder, -:323: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #323: FILE: drivers/gpu/drm/i915/intel_vdsc.c:841: + rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] << ^ -:326: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #326: FILE: drivers/gpu/drm/i915/intel_vdsc.c:844: + rc_buf_thresh_dword[i/4]); ^ -:367: WARNING:LONG_LINE: line over 100 characters #367: FILE: drivers/gpu/drm/i915/intel_vdsc.c:885: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << -:367: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #367: FILE: drivers/gpu/drm/i915/intel_vdsc.c:885: + rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << ^ -:374: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV) #374: FILE: drivers/gpu/drm/i915/intel_vdsc.c:892: + rc_range_params_dword[i/2]); ^ -:475: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #475: FILE: drivers/gpu/drm/i915/intel_vdsc.c:993: +{ + -:482: WARNING:RETURN_VOID: void function return statements are not generally useful #482: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1000: + return; +} total: 0 errors, 2 warnings, 6 checks, 441 lines checked bbf10b6974d7 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs 8a405e9334df drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes 93f7f38daf9d drm/i915/icl: Add Display Stream Splitter control registers -:68: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx>' total: 0 errors, 1 warnings, 0 checks, 39 lines checked 5dbf3482277d drm/i915/dp: Configure Display stream splitter registers during DSC enable 1e8be3413e03 drm/i915/dp: Disable DSC in source by disabling DSS CTL bits -:33: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #33: FILE: drivers/gpu/drm/i915/i915_drv.h:3512: +extern void intel_dsc_disable(struct intel_encoder *encoder, -:109: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #109: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1076: + +} total: 0 errors, 0 warnings, 2 checks, 69 lines checked 4fd1d74f4b66 drm/i915/dsc: Enable and disable appropriate power wells for VDSC -:34: ERROR:CODE_INDENT: code indent should use tabs where possible #34: FILE: drivers/gpu/drm/i915/intel_vdsc.c:590: + * On ICL+ PW2/ POWER_DOMAIN_VDSC_PIPE_A is required for$ -:35: ERROR:CODE_INDENT: code indent should use tabs where possible #35: FILE: drivers/gpu/drm/i915/intel_vdsc.c:591: + * VDSC/joining for eDP transcoder.$ -:36: ERROR:CODE_INDENT: code indent should use tabs where possible #36: FILE: drivers/gpu/drm/i915/intel_vdsc.c:592: + * For any other transcoder, VDSC/joining uses the power well associated$ -:37: ERROR:CODE_INDENT: code indent should use tabs where possible #37: FILE: drivers/gpu/drm/i915/intel_vdsc.c:593: + * with the pipe/transcoder in use.$ -:38: ERROR:CODE_INDENT: code indent should use tabs where possible #38: FILE: drivers/gpu/drm/i915/intel_vdsc.c:594: + */$ total: 5 errors, 0 warnings, 0 checks, 41 lines checked 95032188e13f drm/i915/dsc: Add Per connector debugfs node for DSC support/enable -:114: WARNING:SYMBOLIC_PERMS: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'. #114: FILE: drivers/gpu/drm/i915/i915_debugfs.c:5052: + debugfs_create_file("i915_dsc_support", S_IRUGO, root, -:142: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #142: FILE: drivers/gpu/drm/i915/intel_drv.h:1168: + bool force_dsc_en; total: 0 errors, 1 warnings, 1 checks, 113 lines checked aa4d5bb53d34 drm/i915/dsc: Force DSC enable if requested by IGT/userspace _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
