On Thu, Sep 27, 2018 at 05:35:00PM +0000, Souza, Jose wrote: > On Thu, 2018-09-27 at 00:48 -0700, Lee, Shawn C wrote: > > Amber Lake used the same gen graphics as Kaby Lake. Kernel driver > > should configure KBL's DDI buffer setting for AML ULX as well. > > > > So far, driver would load DDI translation table that used for > > KBL H/S platform and apply it on AML devices. But AML is belong to > > ULX series. This change will lead driver to apply KBL-Y's DDI table > > for AML devices to avoid unexpected eDP/DP signal quality issue. > > > > Cc: Jani Nikula <jani.nikula@xxxxxxxxx> > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Cc: Jose Roberto de Souza <jose.souza@xxxxxxxxx> > > On both patches: > Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> Pushed both patches to dinq. I accidentally forgot to propagate the rv-b to one of the patches. I'm so sorry... > > > Signed-off-by: Lee, Shawn C <shawn.c.lee@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_ddi.c | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > > b/drivers/gpu/drm/i915/intel_ddi.c > > index b6910c8b4e08..b051970912a3 100644 > > --- a/drivers/gpu/drm/i915/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/intel_ddi.c > > @@ -642,7 +642,7 @@ skl_get_buf_trans_dp(struct drm_i915_private > > *dev_priv, int *n_entries) > > static const struct ddi_buf_trans * > > kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int > > *n_entries) > > { > > - if (IS_KBL_ULX(dev_priv)) { > > + if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) { > > *n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp); > > return kbl_y_ddi_translations_dp; > > } else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) { > > @@ -658,7 +658,7 @@ static const struct ddi_buf_trans * > > skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int > > *n_entries) > > { > > if (dev_priv->vbt.edp.low_vswing) { > > - if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) { > > + if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) || > > IS_AML_ULX(dev_priv)) { > > *n_entries = > > ARRAY_SIZE(skl_y_ddi_translations_edp); > > return skl_y_ddi_translations_edp; > > } else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv) > > || > > @@ -680,7 +680,7 @@ skl_get_buf_trans_edp(struct drm_i915_private > > *dev_priv, int *n_entries) > > static const struct ddi_buf_trans * > > skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int > > *n_entries) > > { > > - if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) { > > + if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) || > > IS_AML_ULX(dev_priv)) { > > *n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi); > > return skl_y_ddi_translations_hdmi; > > } else { > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx