On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote: > Do not rely on crtc->config any more. Remove the assertion from > ibx_pch_dpll_disable, because we the dpll state tracking should > already handle this case correctly. > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 14 ++++++------ > drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++---------------- > drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++--- > 3 files changed, 22 insertions(+), 29 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index fe8ccbdd4ea1..4df4293a7917 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state, > * Note that enable_shared_dpll tries to do the right thing, but > * get_shared_dpll unconditionally resets the pll - we need that to have > * the right LVDS enable sequence. */ > - intel_enable_shared_dpll(crtc); > + intel_enable_shared_dpll(crtc_state); > > /* set transcoder timing, panel must allow it */ > assert_panel_unlocked(dev_priv, pipe); > @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, > intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); > intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false); > > - if (intel_crtc->config->has_pch_encoder) > - intel_prepare_shared_dpll(intel_crtc); > + if (pipe_config->has_pch_encoder) > + intel_prepare_shared_dpll(pipe_config); > > if (intel_crtc_has_dp_encoder(intel_crtc->config)) > intel_dp_set_m_n(intel_crtc, M1_N1); > @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, > > intel_encoders_pre_pll_enable(crtc, pipe_config, old_state); > > - if (intel_crtc->config->shared_dpll) > - intel_enable_shared_dpll(intel_crtc); > + if (pipe_config->shared_dpll) > + intel_enable_shared_dpll(pipe_config); > > if (INTEL_GEN(dev_priv) >= 11) > icl_map_plls_to_ports(crtc, pipe_config, old_state); > @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc, > > intel_fbc_disable(intel_crtc); > intel_update_watermarks(intel_crtc); > - intel_disable_shared_dpll(intel_crtc); > + intel_disable_shared_dpll(crtc_state); I guess this is the explosion on i915g/i965g. We've already freed this crtc state at this point. So I guess s/crtc_state/crtc->state/ and it should be fine? -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
