On Wed, 2018-10-03 at 08:07 +0000, Alexandru-Cosmin Gheorghe wrote: > On Wed, Oct 03, 2018 at 06:39:00AM +0000, Lisovskiy, Stanislav wrote: > > On Tue, 2018-10-02 at 15:28 +0000, Alexandru-Cosmin Gheorghe wrote: > > > Hi, > > > > > > On Tue, Oct 02, 2018 at 02:15:42PM +0300, Stanislav Lisovskiy > > > wrote: > > > > v5: This is YUV444 packed format same as AYUV, but without > > > > alpha, > > > > as supported by i915. > > > > > > > > v6: Removed unneeded initializer for new XYUV format. > > > > > > > > v7: Added is_yuv field initialization according to latest > > > > drm_fourcc format structure initialization changes. > > > > > > > > v8: Edited commit message to be more clear about skl+, renamed > > > > PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this > > > > format > > > > doesn't support per-pixel alpha. Fixed minor code issues. > > > > > > > > v9: Moved DRM format check to proper place in > > > > intel_framebuffer_init. > > > > > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.c > > > > om> > > > > > > Reviewed-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@xxxxxx > > > m> > > > > > > I'm planning of sending a new version with my series[1], do you > > > think > > > this patch will get merged soon, or is there anything else that > > > needs > > > to be done. > > > > > > [1] https://lists.freedesktop.org/archives/dri-devel/2018- > > > August/186963.html > > > > Hi, > > > > I had to implement IGT test case and xf86-video-intel support for > > this > > new format(in order to check that it works with gstreamer as we > > have > > userspace requirement for this change), so currently I guess all > > the > > requirements are met. I might need to do some > > minor changes in those patches though, once I get some feedback. > > A bit offtopic do we need userspace for adding a new fourcc as well, > I thought those are extempted from "must have userspace rule". Well, at least in my case I was asked to do that. Interesting task though :) Currently I check with GStreamer, so that video works both in textured and sprite format. BTW, I have changed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV8888 so that it is compliant with your change. As I understood we've agreed to have it called that way instead of DRM_FORMAT_XYUV. Are you ok with that? I will then send a new patch for IGT, xf86-video-intel and drm today. > > > > > > > > > --- > > > > drivers/gpu/drm/drm_fourcc.c | 1 + > > > > include/uapi/drm/drm_fourcc.h | 1 + > > > > 2 files changed, 2 insertions(+) > > > > > > > > diff --git a/drivers/gpu/drm/drm_fourcc.c > > > > b/drivers/gpu/drm/drm_fourcc.c > > > > index be1d6aaef651..60752d0be9d8 100644 > > > > --- a/drivers/gpu/drm/drm_fourcc.c > > > > +++ b/drivers/gpu/drm/drm_fourcc.c > > > > @@ -190,6 +190,7 @@ const struct drm_format_info > > > > *__drm_format_info(u32 format) > > > > { .format = DRM_FORMAT_UYVY, .d > > > > epth > > > > = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = > > > > 1, > > > > .is_yuv = true }, > > > > { .format = DRM_FORMAT_VYUY, .d > > > > epth > > > > = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = > > > > 1, > > > > .is_yuv = true }, > > > > { .format = DRM_FORMAT_AYUV, .d > > > > epth > > > > = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = > > > > 1, > > > > .has_alpha = true, .is_yuv = true }, > > > > + { .format = DRM_FORMAT_XYUV, .d > > > > epth > > > > = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = > > > > 1, > > > > .is_yuv = true }, > > > > }; > > > > > > > > unsigned int i; > > > > diff --git a/include/uapi/drm/drm_fourcc.h > > > > b/include/uapi/drm/drm_fourcc.h > > > > index 139632b87181..88d2e491f40c 100644 > > > > --- a/include/uapi/drm/drm_fourcc.h > > > > +++ b/include/uapi/drm/drm_fourcc.h > > > > @@ -151,6 +151,7 @@ extern "C" { > > > > #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', > > > > 'U', > > > > 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */ > > > > > > > > #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', > > > > 'U', > > > > 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ > > > > +#define DRM_FORMAT_XYUV fourcc_code('X', 'Y', > > > > 'U', > > > > 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */ > > > > > > > > /* > > > > * 2 plane RGB + A > > > > -- > > > > 2.17.1 > > > > > > > > _______________________________________________ > > > > dri-devel mailing list > > > > dri-devel@xxxxxxxxxxxxxxxxxxxxx > > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > > > > > > > > > -- > > Best Regards, > > > > Lisovskiy Stanislav > > -- Best Regards, Lisovskiy Stanislav _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
