On Mon, Sep 24, 2018 at 09:54:35AM -0700, Lucas De Marchi wrote:
> Display WA #1178 is meant to fix Aux channel voltage swing too low with
> some type C dongles. Although it is for type C, of ICL it only applies
> to combo phy and not to eDP. This means we need to apply the WA only on
> Aux B.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Imre Deak <imre.deak@xxxxxxxxx>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e7e6ca7f9665..1e92112d23de 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8928,6 +8928,10 @@ enum skl_power_gate {
> #define CNL_AUX_ANAOVRD1_ENABLE (1 << 16)
> #define CNL_AUX_ANAOVRD1_LDO_BYPASS (1 << 23)
>
> +#define ICL_AUX_ANAOVRD1_B _MMIO(0x6C398)
> +#define ICL_AUX_ANAOVRD1_LDO_BYPASS (1 << 7)
> +#define ICL_AUX_ANAOVRD1_ENABLE (1 << 0)
> +
> /* HDCP Key Registers */
> #define HDCP_KEY_CONF _MMIO(0x66c00)
> #define HDCP_AKSV_SEND_TRIGGER BIT(31)
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 0fdabce647ab..a97d2f762b77 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -436,6 +436,13 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> I915_WRITE(ICL_PORT_CL_DW12(port), val | ICL_LANE_ENABLE_AUX);
>
> hsw_wait_for_power_well_enable(dev_priv, power_well);
> +
> + /* Display WA #1178: icl */
> + if (IS_ICELAKE(dev_priv) && pw_idx == ICL_PW_CTL_IDX_AUX_B) {
Spec tells:
CNL: This programming does not apply to Aux A.
ILC: Aux A: Set 0x162398 bit 0 and bit 7 = 1
with extra note of This programming only applies for external ports on the combo PHY,
not on type C PHY, and not for eDP.
So I believe we need to add Aux A here and add a check for !is_edp
> + val = I915_READ(ICL_AUX_ANAOVRD1_B);
> + val |= ICL_AUX_ANAOVRD1_ENABLE | ICL_AUX_ANAOVRD1_LDO_BYPASS;
> + I915_WRITE(ICL_AUX_ANAOVRD1_B, val);
> + }
> }
>
> static void
> --
> 2.17.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
