On Wed, Oct 03, 2018 at 02:31:08PM +0300, Juha-Pekka Heikkila wrote: > Hi Alex, > > For my patches there seems limited interest to get them merged before IGT > support these modes..I'm not holding my breath for this. I'm interested if that counts. I asked the same question on the DRM_FORMAT_XYUV thread, do we need to wait for userspace to get new fourcc merged. > > https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html > > /Juha-Pekka > > On 02.10.2018 18:00, Alexandru-Cosmin Gheorghe wrote: > >Hi, > > > >How is this going on, anything holding it back from getting merged ? > >I'm interested in adding/using P010, [1] > > > >Thank you, > >Alex Gheorghe > > > >[1] https://lists.freedesktop.org/archives/dri-devel/2018-August/186963.html > > > >On Thu, Aug 30, 2018 at 03:41:11PM +0300, Juha-Pekka Heikkila wrote: > >>Add P010 definition, semi-planar yuv format where each component > >>is 16 bits 10 msb containing color value. First come Y plane [10:6] > >>followed by 2x2 subsampled Cr:Cb plane [10:6:10:6] > >> > >>Add P012 definition, semi-planar yuv format where each component > >>is 16 bits 12 msb containing color value. First come Y plane [12:4] > >>followed by 2x2 subsampled Cr:Cb plane [12:4:12:4] > >> > >>Add P016 definition, semi-planar yuv format where each component > >>is 16 bits. First come Y plane followed by 2x2 subsampled Cr:Cb > >>plane [16:16] > >> > >>Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@xxxxxxxxx> > >>--- > >> drivers/gpu/drm/drm_fourcc.c | 3 +++ > >> include/uapi/drm/drm_fourcc.h | 10 ++++++++++ > >> 2 files changed, 13 insertions(+) > >> > >>diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > >>index 35c1e27..32e07a2 100644 > >>--- a/drivers/gpu/drm/drm_fourcc.c > >>+++ b/drivers/gpu/drm/drm_fourcc.c > >>@@ -173,6 +173,9 @@ const struct drm_format_info *__drm_format_info(u32 format) > >> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, > >> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, > >> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true }, > >>+ { .format = DRM_FORMAT_P010, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > >>+ { .format = DRM_FORMAT_P012, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > >>+ { .format = DRM_FORMAT_P016, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, > >> }; > >> unsigned int i; > >>diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > >>index 2ed46e9..daaabb1 100644 > >>--- a/include/uapi/drm/drm_fourcc.h > >>+++ b/include/uapi/drm/drm_fourcc.h > >>@@ -178,6 +178,16 @@ extern "C" { > >> #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ > >> /* > >>+ * 2 plane YCbCr > >>+ * index 0 = Y plane, [15:0] Y little endian where Pxxx indicate > >>+ * component xxx msb Y [xxx:16-xxx] > >>+ * index 1 = Cr:Cb plane, [31:0] Cr:Cb little endian [xxx:16-xxx:xxx:16-xxx] > >>+ */ > >>+#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane, 10 bit per channel */ > >>+#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cr:Cb plane, 12 bit per channel */ > >>+#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane, 16 bit per channel */ > >>+ > >>+/* > >> * 3 plane YCbCr > >> * index 0: Y plane, [7:0] Y > >> * index 1: Cb plane, [7:0] Cb > >>-- > >>2.7.4 > >> > >>_______________________________________________ > >>dri-devel mailing list > >>dri-devel@xxxxxxxxxxxxxxxxxxxxx > >>https://lists.freedesktop.org/mailman/listinfo/dri-devel > > -- Cheers, Alex G _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
