On Wed, Oct 03, 2018 at 03:37:14PM +0200, Maarten Lankhorst wrote:
> Fixing chv_set_phy_signal_level() still requires too many levels of
> indirection to pass crtc_state along.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dpio_phy.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index 00b3ab656b06..3c7f10d17658 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -748,7 +748,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder,
> val |= DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET;
> vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val);
>
> - if (crtc->config->lane_count > 2) {
> + if (crtc_state->lane_count > 2) {
> val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));
> if (reset)
> val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);
> @@ -765,7 +765,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder,
> val |= DPIO_PCS_CLK_SOFT_RESET;
> vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val);
>
> - if (crtc->config->lane_count > 2) {
> + if (crtc_state->lane_count > 2) {
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));
> val |= CHV_PCS_REQ_SOFTRESET_EN;
> if (reset)
> --
> 2.19.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
