Re: [PATCH 5/8] drm/i915/psr: Do not enable PSR2 if sink requires selective update X granularity

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On Thu, 2018-09-20 at 13:43 -0700, José Roberto de Souza wrote:
> According to eDP spec, sink could required a granularity in the
> start of x coordinate or in the width of the selective update region.
> As it is not supported by hardware, 

I think this warrants an explanation, what is not supported in
hardware? A certain granularity that a specific sink expects?

Even if the sink does not require a specific granularity, the source
has to support the standard granularity values (x%16 = w%4 =  y%1 = 0).
Another sink can have these standard values, supported by hardware, as
a requirement and your patch will disable PSR2 on it.


-DK

> lets not enable PSR2 in sinks
> that requires it.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 0dd4211cb293..84b512426514 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -243,6 +243,8 @@ void intel_psr_init_dpcd(struct intel_dp
> *intel_dp)
>  		bool y_req = intel_dp->psr_dpcd[1] &
>  			     DP_PSR2_SU_Y_COORDINATE_REQUIRED;
>  		bool alpm = intel_dp_get_alpm_status(intel_dp);
> +		bool granularity_req = (intel_dp->psr_dpcd[1] &
> +					DP_PSR2_SU_GRANULARITY_REQUI
> RED);
>  
>  		/*
>  		 * All panels that supports PSR version 03h (PSR2 +
> @@ -255,7 +257,8 @@ void intel_psr_init_dpcd(struct intel_dp
> *intel_dp)
>  		 * Y-coordinate requirement panels we would need to
> enable
>  		 * GTC first.
>  		 */
> -		dev_priv->psr.sink_psr2_support = y_req && alpm;
> +		dev_priv->psr.sink_psr2_support = y_req && alpm &&
> +						  !granularity_req;
>  		DRM_DEBUG_KMS("PSR2 %ssupported\n",
>  			      dev_priv->psr.sink_psr2_support ? "" :
> "not ");
>  
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