On Fri, Sep 21, 2018 at 06:20:37PM +0200, Maarten Lankhorst wrote: > Op 21-09-18 om 18:15 schreef Ville Syrjälä: > > On Fri, Sep 21, 2018 at 06:00:27PM +0200, Maarten Lankhorst wrote: > >> Op 21-09-18 om 17:26 schreef Ville Syrjälä: > >>> On Thu, Sep 20, 2018 at 12:27:06PM +0200, Maarten Lankhorst wrote: > >>>> We need to assume the plane has been visible before, even if no CRTC > >>>> is assigned to the plane. This is because nv12 will enable a a extra > >>>> plane and make it visible by marking it in crtc_state->active_planes > >>>> for intel_update_planes_on_crtc(). > >>>> > >>>> Additionally, clear visible flag in intel_plane_atomic_check, in case > >>>> we ever hit a bug with visibility. Our code implicitly assumes that > >>>> plane_state->visible is only true when crtc and fb are set, > >>>> so we will either null deref in intel_fbc_choose_crtc() or > >>>> do something bad during the actual commit which cares even more. > >>>> > >>>> Changes since v1: > >>>> - Unconditionally clear crtc_state->active_planes as well. > >>>> - Reword commit message, since this is now a preparation patch for > >>>> NV12 Y / UV plane linking. > >>>> > >>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > >>>> --- > >>>> drivers/gpu/drm/i915/intel_atomic_plane.c | 8 +++++--- > >>>> 1 file changed, 5 insertions(+), 3 deletions(-) > >>>> > >>>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c > >>>> index aabebe0d2e9b..f70e9cb9cf02 100644 > >>>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c > >>>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c > >>>> @@ -117,10 +117,13 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ > >>>> struct intel_plane *intel_plane = to_intel_plane(plane); > >>>> int ret; > >>>> > >>>> + crtc_state->active_planes &= ~BIT(intel_plane->id); > >>> nv12_planes too? > >> No, we don't have to. We don't set nv12_planes on the Y plane. :) > >> In all other cases we clear it correctly. > > I think sticking to single approach would be less confusing nonetheless. > > > Agreed, will fix it up when pushing this patch. > > Can I add your r-b on it then? Sure. Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
