On 20/09/18 07:33, Mika Kuoppala wrote:
Getting interrupt without any second level indications is unlikely.
Do you have any numbers for this? I remember seeing empty interrupts quite often (i.e. up to 5-10%) in early testing on workloads submitting lots of no-ops due to the double buffering, when both events ended up being serviced by the first interrupt. The code was different at the time though, so those might just have been due to less optimal SW handing, but I'd be curious to see the numbers if you have any.
Thanks, Daniele _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
