Quoting Mika Kuoppala (2018-09-20 15:33:49) > Don't keep master disabled while handling display interrupts. > This should help a little with latency of generating the > next interrupt. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_irq.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index b4992d397c5d..27116e3f21af 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -3162,13 +3162,11 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) > return IRQ_NONE; > > master_ctl = gen11_master_irq_disable(regs); > - > - gen11_display_irq_handler(i915, master_ctl); > gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl); > - > gen11_master_irq_enable(regs); > > gen11_gt_irq_handler(i915, master_ctl); > + gen11_display_irq_handler(i915, master_ctl); > gen11_gu_misc_irq_handler(i915, gu_misc_iir); Hmm. So we no longer do ack within the interrupts off section. Is there even a point to disabling master-ctl in that scenario. The danger is simply we raise more master interrupts for sub-level interrupts that we proceed to handle. Doesn't seem like a huge deal... But there's usually some interesting rules on edge level interrupt that bite. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
