On Wed, Sep 19, 2018 at 03:56:30PM +0200, Maarten Lankhorst wrote: > Use old/new_intel_crtc_state, and get rid of all the conversion casts > where they don't add anything. > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 22 ++++++++++++---------- > 1 file changed, 12 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index eb25037d7b38..2ac381eb8103 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12665,8 +12665,9 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) > struct intel_atomic_state *intel_state = to_intel_atomic_state(state); > struct drm_i915_private *dev_priv = to_i915(dev); > struct drm_crtc_state *old_crtc_state, *new_crtc_state; > + struct intel_crtc_state *new_intel_crtc_state, *old_intel_crtc_state; > struct drm_crtc *crtc; > - struct intel_crtc_state *intel_cstate; > + struct intel_crtc *intel_crtc; > u64 put_domains[I915_MAX_PIPES] = {}; > int i; > > @@ -12678,21 +12679,22 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) > intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET); > > for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { It looks like we have a for_each_oldnew_intel_plane_in_state, but not a for_each_oldnew_intel_crtc_in_state yet. If we added the Intel-specific iterator, then we could simplify this function a bit further by dropping the base versions of crtc, old_crtc_state, and new_crtc_state here and renaming the Intel-specific subtypes. I believe Ville mentioned that on the other thread. Anyway, the general cleanup here looks fine, so Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> even if you decide to defer further cleanup via for_each_oldnew_intel_crtc_in_state to later. Matt > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + old_intel_crtc_state = to_intel_crtc_state(old_crtc_state); > + new_intel_crtc_state = to_intel_crtc_state(new_crtc_state); > + intel_crtc = to_intel_crtc(crtc); > > if (needs_modeset(new_crtc_state) || > to_intel_crtc_state(new_crtc_state)->update_pipe) { > > - put_domains[to_intel_crtc(crtc)->pipe] = > + put_domains[intel_crtc->pipe] = > modeset_get_crtc_power_domains(crtc, > - to_intel_crtc_state(new_crtc_state)); > + new_intel_crtc_state); > } > > if (!needs_modeset(new_crtc_state)) > continue; > > - intel_pre_plane_update(to_intel_crtc_state(old_crtc_state), > - to_intel_crtc_state(new_crtc_state)); > + intel_pre_plane_update(old_intel_crtc_state, new_intel_crtc_state); > > if (old_crtc_state->active) { > intel_crtc_disable_planes(crtc, old_crtc_state->plane_mask); > @@ -12703,7 +12705,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) > */ > intel_crtc_disable_pipe_crc(intel_crtc); > > - dev_priv->display.crtc_disable(to_intel_crtc_state(old_crtc_state), state); > + dev_priv->display.crtc_disable(old_intel_crtc_state, state); > intel_crtc->active = false; > intel_fbc_disable(intel_crtc); > intel_disable_shared_dpll(intel_crtc); > @@ -12724,7 +12726,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) > */ > if (INTEL_GEN(dev_priv) >= 9) > dev_priv->display.initial_watermarks(intel_state, > - to_intel_crtc_state(new_crtc_state)); > + new_intel_crtc_state); > } > } > } > @@ -12784,11 +12786,11 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) > * TODO: Move this (and other cleanup) to an async worker eventually. > */ > for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { > - intel_cstate = to_intel_crtc_state(new_crtc_state); > + new_intel_crtc_state = to_intel_crtc_state(new_crtc_state); > > if (dev_priv->display.optimize_watermarks) > dev_priv->display.optimize_watermarks(intel_state, > - intel_cstate); > + new_intel_crtc_state); > } > > for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { > -- > 2.18.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx