Hello Daniel
There is no difference with intel_reg_dumper. I took a probe during correct display (1080i), after 2 days, when I moved the
television out of stand-by (display is green) and after a shutdown/start during a correct display. See below.
Also dmesg at start and when coming out of stand-by is the same.
I have seen messages from Paulo Zanoni:
[PATCH 1/2] drm/i915: set interlaced bits for TRANSCONF
Are they eventually needed in my case ? Could you incorporate these in your git interlace tree or otherwise tell me where to find
them.
As I reread the messages, there seem to be occasions that when HDMI is only connected the display can't come up correct. I have also
only HDMI connected, but never have seen any misbehavior, it comes up in 1080i.
What can I do to isolate the problem.
Angela
[ 9.527763] HDMI hot plug event: Codec=3 Pin=7 Presence_Detect=1 ELD_Valid=1
[ 9.527845] HDMI status: Codec=3 Pin=7 Presence_Detect=1 ELD_Valid=1
[ 9.527885] HDMI status: Codec=3 Pin=7 Presence_Detect=1 ELD_Valid=1
[ 9.534461] HDMI: detected monitor Philips FTV at connection type HDMI
[ 9.534462] HDMI: available speakers: FL/FR
[ 9.534464] HDMI: supports coding type LPCM: channels = 2, rates = 32000 44100 48000 96000 176400, bits = 16 20 24
[ 9.534466] HDMI: supports coding type AC-3: channels = 6, rates = 32000 44100 48000, max bitrate = 640000
[ 9.534468] HDMI: supports coding type MPEG1: channels = 2, rates = 32000 44100 48000, max bitrate = 1072000
[374280.746752] HDMI hot plug event: Codec=3 Pin=7 Presence_Detect=1 ELD_Valid=1
[374280.746799] HDMI status: Codec=3 Pin=7 Presence_Detect=1 ELD_Valid=1
[374280.750481] HDMI: detected monitor Philips FTV at connection type HDMI
[374280.750483] HDMI: available speakers: FL/FR
[374280.750486] HDMI: supports coding type LPCM: channels = 2, rates = 32000 44100 48000 96000 176400, bits = 16 20 24
[374280.750489] HDMI: supports coding type AC-3: channels = 6, rates = 32000 44100 48000, max bitrate = 640000
[374280.750491] HDMI: supports coding type MPEG1: channels = 2, rates = 32000 44100 48000, max bitrate = 1072000
PGETBL_CTL: 0x00000000
GEN6_INSTDONE_1: 0xfffffffe
GEN6_INSTDONE_2: 0xffffffff
CPU_VGACNTRL: 0x80000000 (disabled)
DIGITAL_PORT_HOTPLUG_CNTRL: 0x00000000
RR_HW_CTL: 0x00000000 (low 0, high 0)
FDI_PLL_BIOS_0: 0xffffffff
FDI_PLL_BIOS_1: 0xffffffff
FDI_PLL_BIOS_2: 0xffffffff
DISPLAY_PORT_PLL_BIOS_0: 0xffffffff
DISPLAY_PORT_PLL_BIOS_1: 0xffffffff
DISPLAY_PORT_PLL_BIOS_2: 0xffffffff
FDI_PLL_FREQ_CTL: 0xffffffff
PIPEACONF: 0xc0600000 (enabled, active, 8bpc)
HTOTAL_A: 0x0a4f077f (1920 active, 2640 total)
HBLANK_A: 0x0a4f077f (1920 start, 2640 end)
HSYNC_A: 0x09bb098f (2448 start, 2492 end)
VTOTAL_A: 0x04630437 (1080 active, 1124 total)
VBLANK_A: 0x04630437 (1080 start, 1124 end)
VSYNC_A: 0x0445043b (1084 start, 1094 end)
VSYNCSHIFT_A: 0x00000468
PIPEASRC: 0x077f0437 (1920, 1080)
PIPEA_DATA_M1: 0x7e1b30f0 (TU 64, val 0x1b30f0 1782000)
PIPEA_DATA_N1: 0x0020f580 (val 0x20f580 2160000)
PIPEA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
PIPEA_DATA_N2: 0x00000000 (val 0x0 0)
PIPEA_LINK_M1: 0x0001220a (val 0x1220a 74250)
PIPEA_LINK_N1: 0x00041eb0 (val 0x41eb0 270000)
PIPEA_LINK_M2: 0x00000000 (val 0x0 0)
PIPEA_LINK_N2: 0x00000000 (val 0x0 0)
DSPACNTR: 0xd8004400 (enabled)
DSPABASE: 0x00000000
DSPASTRIDE: 0x00001e00 (120)
DSPASURF: 0x0084d000
DSPATILEOFF: 0x00000000 (0, 0)
PIPEBCONF: 0x00000000 (disabled, inactive, 8bpc)
HTOTAL_B: 0x00000000 (1 active, 1 total)
HBLANK_B: 0x00000000 (1 start, 1 end)
HSYNC_B: 0x00000000 (1 start, 1 end)
VTOTAL_B: 0x00000000 (1 active, 1 total)
VBLANK_B: 0x00000000 (1 start, 1 end)
VSYNC_B: 0x00000000 (1 start, 1 end)
VSYNCSHIFT_B: 0x00000000
DSPBCNTR: 0x00004000 (disabled)
DSPBBASE: 0x00000000
DSPBSTRIDE: 0x00000000 (0)
DSPBSURF: 0x00000000
DSPBTILEOFF: 0x00000000 (0, 0)
PIPEBSRC: 0x00000000 (1, 1)
PIPEB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N1: 0x00000000 (val 0x0 0)
PIPEB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
PIPEB_DATA_N2: 0x00000000 (val 0x0 0)
PIPEB_LINK_M1: 0x00000000 (val 0x0 0)
PIPEB_LINK_N1: 0x00000000 (val 0x0 0)
PIPEB_LINK_M2: 0x00000000 (val 0x0 0)
PIPEB_LINK_N2: 0x00000000 (val 0x0 0)
PFA_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least,
filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_CTL_2: 0x00007ef2 (vscale 0.991760)
PFA_CTL_3: 0x00003f79 (vscale initial phase 0.495880)
PFA_CTL_4: 0x00007c40 (hscale 0.970703)
PFA_WIN_POS: 0x00000000 (0, 0)
PFA_WIN_SIZE: 0x00000000 (0, 0)
PFB_CTL_1: 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least,
filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFB_CTL_2: 0x00000000 (vscale 0.000000)
PFB_CTL_3: 0x00000000 (vscale initial phase 0.000000)
PFB_CTL_4: 0x00000000 (hscale 0.000000)
PFB_WIN_POS: 0x00000000 (0, 0)
PFB_WIN_SIZE: 0x00000000 (0, 0)
PCH_DREF_CONTROL: 0x00000400 (cpu source disable, ssc_source disable, nonspread_source enable, superspread_source
disable, ssc4_mode downspread, ssc1 disable, ssc4 disable)
PCH_RAWCLK_FREQ: 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
PCH_DPLL_TMR_CFG: 0x0271186a
PCH_SSC4_PARMS: 0x01204860
PCH_SSC4_AUX_PARMS: 0x000029c5
PCH_DPLL_SEL: 0x00000008 (TransA DPLL enable (DPLL A), TransB DPLL disable (DPLL (null)))
PCH_DPLL_ANALOG_CTL: 0x00008000
PCH_DPLL_A: 0xc4080008 (enable, sdvo high speed yes, mode (null), p2 (null), FPA0 P1 4, FPA1 P1 4, refclk
default 120Mhz, sdvo/hdmi mul 1)
PCH_DPLL_B: 0x04800080 (disable, sdvo high speed no, mode (null), p2 (null), FPA0 P1 8, FPA1 P1 8, refclk
default 120Mhz, sdvo/hdmi mul 1)
PCH_FPA0: 0x00021007 (n = 2, m1 = 16, m2 = 7)
PCH_FPA1: 0x00021007 (n = 2, m1 = 16, m2 = 7)
PCH_FPB0: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
PCH_FPB1: 0x00030d07 (n = 3, m1 = 13, m2 = 7)
TRANS_HTOTAL_A: 0x0a4f077f (1920 active, 2640 total)
TRANS_HBLANK_A: 0x0a4f077f (1920 start, 2640 end)
TRANS_HSYNC_A: 0x09bb098f (2448 start, 2492 end)
TRANS_VTOTAL_A: 0x04630437 (1080 active, 1124 total)
TRANS_VBLANK_A: 0x04630437 (1080 start, 1124 end)
TRANS_VSYNC_A: 0x0445043b (1084 start, 1094 end)
TRANSA_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N1: 0x00000000 (val 0x0 0)
TRANSA_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSA_DATA_N2: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSA_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_B: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_B: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_B: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_B: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_B: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_B: 0x00000000 (1 start, 1 end)
TRANSB_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N1: 0x00000000 (val 0x0 0)
TRANSB_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSB_DATA_N2: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSB_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANS_HTOTAL_C: 0x00000000 (1 active, 1 total)
TRANS_HBLANK_C: 0x00000000 (1 start, 1 end)
TRANS_HSYNC_C: 0x00000000 (1 start, 1 end)
TRANS_VTOTAL_C: 0x00000000 (1 active, 1 total)
TRANS_VBLANK_C: 0x00000000 (1 start, 1 end)
TRANS_VSYNC_C: 0x00000000 (1 start, 1 end)
TRANSC_DATA_M1: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N1: 0x00000000 (val 0x0 0)
TRANSC_DATA_M2: 0x00000000 (TU 1, val 0x0 0)
TRANSC_DATA_N2: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M1: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N1: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_M2: 0x00000000 (val 0x0 0)
TRANSC_DP_LINK_N2: 0x00000000 (val 0x0 0)
TRANSACONF: 0xc0600000 (enable, active)
TRANSBCONF: 0x00000000 (disable, inactive)
TRANSCCONF: 0x00000000 (disable, inactive)
FDI_TXA_CTL: 0xb0044000 (enable, train pattern not train, voltage swing 0.4V,pre-emphasis 0dB, port width X1,
enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
FDI_TXB_CTL: 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1,
enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
FDI_TXC_CTL: 0x00000000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis 0dB, port width X1,
enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable)
FDI_RXA_CTL: 0x80002350 (enable, train pattern not train, port width X1, 8bpc,link_reverse_strap_overwrite no,
dmi_link_reverse no, FDI PLL enable,FS ecc disable, FE ecc disable, FS err report enable, FE err report enable,scrambing enable,
enhanced framing enable, PCDClk)
FDI_RXB_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no,
dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable,
enhanced framing enable, RawClk)
FDI_RXC_CTL: 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no,
dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable,
enhanced framing enable, RawClk)
FDI_RXA_MISC: 0x00000080 (FDI Delay 128)
FDI_RXB_MISC: 0x00000080 (FDI Delay 128)
FDI_RXC_MISC: 0x00000080 (FDI Delay 128)
FDI_RXA_TUSIZE1: 0x7e000000
FDI_RXA_TUSIZE2: 0x7e000000
FDI_RXB_TUSIZE1: 0x7e000000
FDI_RXB_TUSIZE2: 0x7e000000
FDI_RXC_TUSIZE1: 0x7e000000
FDI_RXC_TUSIZE2: 0x7e000000
FDI_PLL_CTL_1: 0x7e000000
FDI_PLL_CTL_2: 0x7e000000
FDI_RXA_IIR: 0x00000000
FDI_RXA_IMR: 0x000008ff
FDI_RXB_IIR: 0x00000000
FDI_RXB_IMR: 0x000008ff
PCH_ADPA: 0x00f40000 (disabled, transcoder A, -hsync, -vsync)
HDMIB: 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
HDMIC: 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
HDMID: 0x80000adc (enabled pipe A 8bpc TMDS HDMI audio enabled +vsync +hsync detected)
PCH_LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
CPU_eDP_A: 0x00000018
PCH_DP_B: 0x00000004
PCH_DP_C: 0x00000004
PCH_DP_D: 0x00000004
TRANS_DP_CTL_A: 0x60000018 (disable port none 8bpc +vsync +hsync)
TRANS_DP_CTL_B: 0x60000018 (disable port none 8bpc +vsync +hsync)
TRANS_DP_CTL_C: 0x60000018 (disable port none 8bpc +vsync +hsync)
BLC_PWM_CPU_CTL2: 0x00000000
BLC_PWM_CPU_CTL: 0x00000000
BLC_PWM_PCH_CTL1: 0x00000000
BLC_PWM_PCH_CTL2: 0x00000000
PCH_PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
PCH_PP_CONTROL: 0xabcd0000 (blacklight disabled, do not power down on reset, panel off)
PCH_PP_ON_DELAYS: 0x00000000
PCH_PP_OFF_DELAYS: 0x00000000
PCH_PP_DIVISOR: 0x00186904
> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel Vetter
> Sent: 10 February 2012 16:45
> To: Angela Schmid
> Cc: 'Intel Graphics Development'; 'Daniel Vetter'
> Subject: Re: Television turns greenish after stand-by
>
> On Fri, Feb 10, 2012 at 08:27:27AM +0100, Angela Schmid wrote:
> > Hello
> >
> > I have Linux 3.3-rc2 with daniels interlace patches. When the television turns off (dpms) and after turning
> on, the blacks are
> > green. This is highly reproducable, however I don't know exactly which conditions have to exist.
> > Restarting X, putting television once again to stand-by and turning on does not work. I have to shut down the
> television for a
> > while.
> >
> > Is it a television problem or eventually produced by the driver ?
> > Any help appreciated.
>
> Driver is the likely culprit. Can you enable 1080i output, check that it
> works and grab the output of intel_reg_dumper from intel-gpu-tools. Then
> please do whatever dance is required to break it, and again grab the
> output of intel_reg_dumper. Hopefully there's some funky register we've
> forgotten to set up again correctly.
>
> Yours, Daniel
> --
> Daniel Vetter
> Mail: daniel at ffwll.ch
> Mobile: +41 (0)79 365 57 48
