On Thu, Sep 13, 2018 at 02:16:26PM +0100, Chris Wilson wrote:
> For finding the panel fitter and PLL for a particular modeset is a part
> of that modeset and should be included with the reset of the
> DRM_DEBUG_KMS.
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7fbc006be44a..3be5fa0acee8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6155,8 +6155,8 @@ static void i9xx_pfit_disable(struct intel_crtc *crtc)
>
> assert_pipe_disabled(dev_priv, crtc->pipe);
>
> - DRM_DEBUG_DRIVER("disabling pfit, current: 0x%08x\n",
> - I915_READ(PFIT_CONTROL));
> + DRM_DEBUG_KMS("disabling pfit, current: 0x%08x\n",
> + I915_READ(PFIT_CONTROL));
> I915_WRITE(PFIT_CONTROL, 0);
> }
>
> @@ -8678,8 +8678,8 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
> ironlake_compute_dpll(crtc, crtc_state, NULL);
>
> if (!intel_get_shared_dpll(crtc, crtc_state, NULL)) {
> - DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
> - pipe_name(crtc->pipe));
> + DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
> + pipe_name(crtc->pipe));
> return -EINVAL;
> }
>
> @@ -9246,8 +9246,8 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
> intel_get_crtc_new_encoder(state, crtc_state);
>
> if (!intel_get_shared_dpll(crtc, crtc_state, encoder)) {
> - DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
> - pipe_name(crtc->pipe));
> + DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
> + pipe_name(crtc->pipe));
> return -EINVAL;
> }
> }
> --
> 2.19.0
>
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