If link training fails on eDP then we fallback to lower link rate and lane count. If the fallback link BW cannot fit the panel's native mode and if the downclock mode exists then we should check if the fallback BW can fit this downclock mode. Suggested-by: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0e400629e85c..bfc56e778d0f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -562,12 +562,21 @@ static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp, uint8_t lane_count) { struct drm_display_mode *fixed_mode = intel_dp->attached_connector->panel.fixed_mode; + struct drm_display_mode *downclock_mode = + intel_dp->attached_connector->panel.downclock_mode; int mode_rate, max_rate; mode_rate = intel_dp_link_required(fixed_mode->clock, 18); max_rate = intel_dp_max_data_rate(link_rate, lane_count); - if (mode_rate > max_rate) + if (mode_rate > max_rate) { + if (downclock_mode) { + mode_rate = intel_dp_link_required(downclock_mode->clock, + 18); + if (mode_rate > max_rate) + return false; + } return false; + } return true; } -- 2.18.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx