On Tue, 10 Jul 2018, Madhav Chauhan <madhav.chauhan@xxxxxxxxx> wrote: > This patch defines DSI_T_INIT_MASTER register for DSI ports > 0/1 which will be used in dphy programming. > > Signed-off-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx> Thanks, pushed to dinq. BR, Jani. > --- > drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0424e45..6129372 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -10069,6 +10069,12 @@ enum skl_power_gate { > #define PREPARE_COUNT_SHIFT 0 > #define PREPARE_COUNT_MASK (0x3f << 0) > > +#define _ICL_DSI_T_INIT_MASTER_0 0x6b088 > +#define _ICL_DSI_T_INIT_MASTER_1 0x6b888 > +#define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \ > + _ICL_DSI_T_INIT_MASTER_0,\ > + _ICL_DSI_T_INIT_MASTER_1) > + > /* bits 31:0 */ > #define _MIPIA_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb084) > #define _MIPIC_DBI_BW_CTRL (dev_priv->mipi_mmio_base + 0xb884) -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx