Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Using the guc, we cannot disable the user interrupt generation as we use > it for driving submission. And from Icelake, we no longer have the > ability to individually mask interrupt generation from each engine, > disabling our ability to fake missed interrupts. > > In both cases, report back to userspace that the missed interrupt > generator is no longer available. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 1f7051e97afb..b4744a68cd88 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4117,6 +4117,17 @@ i915_ring_test_irq_set(void *data, u64 val) > { > struct drm_i915_private *i915 = data; > > + /* GuC keeps the user interrupt permanently enabled for submission */ > + if (USES_GUC_SUBMISSION(i915)) > + return -ENODEV; > + > + /* > + * From icl, we can no longer individually mask interrupt generation > + * from each engine. > + */ > + if (INTEL_GEN(i915) >= 11) > + return -ENODEV; Perhaps we can go with sw masks in future. Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > + > val &= INTEL_INFO(i915)->ring_mask; > DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val); > > -- > 2.19.0.rc2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx