Quoting Tvrtko Ursulin (2018-09-05 10:49:02) > > On 04/09/2018 16:31, Chris Wilson wrote: > > Future gen reduce the number of bits we will have available to > > differentiate between contexts, so reduce the lifetime of the ID > > assignment from that of the context to its current active cycle (i.e. > > only while it is pinned for use by the HW, will it have a constant ID). > > This means that instead of a max of 2k allocated contexts (worst case > > before fun with bit twiddling), we instead have a limit of 2k in flight > > contexts (minus a few that have been pinned by the kernel or by perf). > > > > To reduce the number of contexts id we require, we allocate a context id > > on first and mark it as pinned for as long as the GEM context itself is, > > that is we keep it pinned it while active on each engine. If we exhaust > > our context id space, then we try to reclaim an id from an idle context. > > In the extreme case where all context ids are pinned by active contexts, > > we force the system to idle in order to recover ids. > > > > We cannot reduce the scope of an HW-ID to an engine (allowing the same > > gem_context to have different ids on each engine) as in the future we > > will need to preassign an id before we know which engine the > > context is being executed on. > > > > v2: Improved commentary (Tvrtko) [I tried at least] > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=107788 > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > Cc: Michel Thierry <michel.thierry@xxxxxxxxx> > > Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> [snip] > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Pushed, thanks for the review. I hope the silence is because it just works and you guys foresee no problems with guc/hw integration! :) -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
