On Tue, 4 Sep 2018 08:01:36 +0100 Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > Quoting Guang Bai (2018-09-04 06:37:31) > > On SKL+ the linear source buffer has to start from cache line > > boundary to meet the 2d engine source copy requirements. > > First update the requirement function. > > Are you sure about this? As this would be quite a reduction in > functionality. There's the bug on bdw+ for not starting on a > cacheline... > -Chris Yes. The latest B-spec for SKL+ XY_FAST_COPY_BLT has this 64-byte cache line requirment for both linear and tiled source surfaces. And I'm not aware of the bdw+ related issues. Without this cache line alignment added, the corruptions (I show you before) will happen. The corrutpion goes away after this alignment added. -Guang _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
