>-----Original Message----- >From: Navare, Manasi D >Sent: Tuesday, July 31, 2018 2:07 PM >To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx >Cc: Navare, Manasi D <manasi.d.navare@xxxxxxxxx>; Jani Nikula ><jani.nikula@xxxxxxxxxxxxxxx>; Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>; >Srivatsa, Anusha <anusha.srivatsa@xxxxxxxxx> >Subject: [PATCH v2 20/23] drm/i915/dp: Populate DSC PPS SDP and send PPS >infoframes > >DSC PPS secondary data packet infoframes are filled with DSC picure parameter >set metadata according to the DSC standard. >These infoframes are sent to the sink device and used during DSC decoding. > >Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> >Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> >Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> >Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> >--- > drivers/gpu/drm/i915/intel_vdsc.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > >diff --git a/drivers/gpu/drm/i915/intel_vdsc.c >b/drivers/gpu/drm/i915/intel_vdsc.c >index e3db9dc..bd5dc96 100644 >--- a/drivers/gpu/drm/i915/intel_vdsc.c >+++ b/drivers/gpu/drm/i915/intel_vdsc.c >@@ -988,6 +988,25 @@ static void intel_configure_pps_for_dsc_encoder(struct >intel_encoder *encoder, > } > } > >+static void intel_dp_send_dsc_pps_sdp(struct intel_encoder *encoder, >+ struct intel_crtc_state *crtc_state) { >+ struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); >+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); >+ struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg; >+ struct drm_dsc_pps_infoframe dp_dsc_pps_sdp; >+ >+ /* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */ >+ drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp); >+ >+ /* Fill the PPS payload bytes as per DSC spec 1.2 Table 4-1 */ >+ drm_dsc_pps_infoframe_pack(&dp_dsc_pps_sdp, vdsc_cfg); >+ >+ intel_dig_port->write_infoframe(&encoder->base, crtc_state, >+ DP_SDP_PPS, &dp_dsc_pps_sdp, >+ sizeof(dp_dsc_pps_sdp)); >+} >+ > void intel_dsc_enable(struct intel_encoder *encoder, > struct intel_crtc_state *crtc_state) { @@ -1003,5 +1022,7 >@@ void intel_dsc_enable(struct intel_encoder *encoder, > > intel_configure_pps_for_dsc_encoder(encoder, crtc_state); > >+ intel_dp_send_dsc_pps_sdp(encoder, crtc_state); >+ > return; > } >-- >2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx