Hi Chris, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.19-rc1 next-20180828] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Handle-incomplete-Z_FINISH-for-compressed-error-states/20180827-090130 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse make ARCH=x86_64 allmodconfig make C=1 CF=-D__CHECK_ENDIAN__ sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/i915_gpu_error.c:854:25: sparse: Using plain integer as NULL pointer drivers/gpu/drm/i915/i915_gpu_error.c:918:23: sparse: expression using sizeof(void) drivers/gpu/drm/i915/i915_gpu_error.c:918:23: sparse: expression using sizeof(void) drivers/gpu/drm/i915/i915_gpu_error.c:1026:21: sparse: expression using sizeof(void) drivers/gpu/drm/i915/i915_gpu_error.c:1026:21: sparse: expression using sizeof(void) include/linux/slab.h:631:13: sparse: undefined identifier '__builtin_mul_overflow' include/linux/slab.h:631:13: sparse: not a function <noident> include/linux/slab.h:631:13: sparse: not a function <noident> include/linux/slab.h:631:13: sparse: not a function <noident> include/linux/slab.h:631:13: sparse: not a function <noident> include/linux/slab.h:631:13: sparse: call with no type! vim +854 drivers/gpu/drm/i915/i915_gpu_error.c 652 653 static int err_print_to_sgl(struct i915_gpu_state *error) 654 { 655 struct drm_i915_error_state_buf m; 656 struct drm_i915_error_object *obj; 657 struct timespec64 ts; 658 int i, j; 659 660 if (READ_ONCE(error->sgl)) 661 return 0; 662 663 memset(&m, 0, sizeof(m)); 664 m.i915 = error->i915; 665 666 if (*error->error_msg) 667 err_printf(&m, "%s\n", error->error_msg); 668 err_printf(&m, "Kernel: " UTS_RELEASE "\n"); 669 ts = ktime_to_timespec64(error->time); 670 err_printf(&m, "Time: %lld s %ld us\n", 671 (s64)ts.tv_sec, ts.tv_nsec / NSEC_PER_USEC); 672 ts = ktime_to_timespec64(error->boottime); 673 err_printf(&m, "Boottime: %lld s %ld us\n", 674 (s64)ts.tv_sec, ts.tv_nsec / NSEC_PER_USEC); 675 ts = ktime_to_timespec64(error->uptime); 676 err_printf(&m, "Uptime: %lld s %ld us\n", 677 (s64)ts.tv_sec, ts.tv_nsec / NSEC_PER_USEC); 678 err_printf(&m, "Epoch: %lu jiffies (%u HZ)\n", error->epoch, HZ); 679 err_printf(&m, "Capture: %lu jiffies; %d ms ago, %d ms after epoch\n", 680 error->capture, 681 jiffies_to_msecs(jiffies - error->capture), 682 jiffies_to_msecs(error->capture - error->epoch)); 683 684 for (i = 0; i < ARRAY_SIZE(error->engine); i++) { 685 if (error->engine[i].hangcheck_stalled && 686 error->engine[i].context.pid) { 687 err_printf(&m, "Active process (on ring %s): %s [%d], score %d%s\n", 688 engine_name(m.i915, i), 689 error->engine[i].context.comm, 690 error->engine[i].context.pid, 691 error->engine[i].context.ban_score, 692 bannable(&error->engine[i].context)); 693 } 694 } 695 err_printf(&m, "Reset count: %u\n", error->reset_count); 696 err_printf(&m, "Suspend count: %u\n", error->suspend_count); 697 err_printf(&m, "Platform: %s\n", intel_platform_name(error->device_info.platform)); 698 err_print_pciid(&m, m.i915); 699 700 err_printf(&m, "IOMMU enabled?: %d\n", error->iommu); 701 702 if (HAS_CSR(m.i915)) { 703 struct intel_csr *csr = &m.i915->csr; 704 705 err_printf(&m, "DMC loaded: %s\n", 706 yesno(csr->dmc_payload != NULL)); 707 err_printf(&m, "DMC fw version: %d.%d\n", 708 CSR_VERSION_MAJOR(csr->version), 709 CSR_VERSION_MINOR(csr->version)); 710 } 711 712 err_printf(&m, "GT awake: %s\n", yesno(error->awake)); 713 err_printf(&m, "RPM wakelock: %s\n", yesno(error->wakelock)); 714 err_printf(&m, "PM suspended: %s\n", yesno(error->suspended)); 715 err_printf(&m, "EIR: 0x%08x\n", error->eir); 716 err_printf(&m, "IER: 0x%08x\n", error->ier); 717 for (i = 0; i < error->ngtier; i++) 718 err_printf(&m, "GTIER[%d]: 0x%08x\n", i, error->gtier[i]); 719 err_printf(&m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); 720 err_printf(&m, "FORCEWAKE: 0x%08x\n", error->forcewake); 721 err_printf(&m, "DERRMR: 0x%08x\n", error->derrmr); 722 err_printf(&m, "CCID: 0x%08x\n", error->ccid); 723 err_printf(&m, "Missed interrupts: 0x%08lx\n", m.i915->gpu_error.missed_irq_rings); 724 725 for (i = 0; i < error->nfence; i++) 726 err_printf(&m, " fence[%d] = %08llx\n", i, error->fence[i]); 727 728 if (INTEL_GEN(m.i915) >= 6) { 729 err_printf(&m, "ERROR: 0x%08x\n", error->error); 730 731 if (INTEL_GEN(m.i915) >= 8) 732 err_printf(&m, "FAULT_TLB_DATA: 0x%08x 0x%08x\n", 733 error->fault_data1, error->fault_data0); 734 735 err_printf(&m, "DONE_REG: 0x%08x\n", error->done_reg); 736 } 737 738 if (IS_GEN7(m.i915)) 739 err_printf(&m, "ERR_INT: 0x%08x\n", error->err_int); 740 741 for (i = 0; i < ARRAY_SIZE(error->engine); i++) { 742 if (error->engine[i].engine_id != -1) 743 error_print_engine(&m, &error->engine[i], error->epoch); 744 } 745 746 for (i = 0; i < ARRAY_SIZE(error->active_vm); i++) { 747 char buf[128]; 748 int len, first = 1; 749 750 if (!error->active_vm[i]) 751 break; 752 753 len = scnprintf(buf, sizeof(buf), "Active ("); 754 for (j = 0; j < ARRAY_SIZE(error->engine); j++) { 755 if (error->engine[j].vm != error->active_vm[i]) 756 continue; 757 758 len += scnprintf(buf + len, sizeof(buf), "%s%s", 759 first ? "" : ", ", 760 m.i915->engine[j]->name); 761 first = 0; 762 } 763 scnprintf(buf + len, sizeof(buf), ")"); 764 print_error_buffers(&m, buf, 765 error->active_bo[i], 766 error->active_bo_count[i]); 767 } 768 769 print_error_buffers(&m, "Pinned (global)", 770 error->pinned_bo, 771 error->pinned_bo_count); 772 773 for (i = 0; i < ARRAY_SIZE(error->engine); i++) { 774 const struct drm_i915_error_engine *ee = &error->engine[i]; 775 776 obj = ee->batchbuffer; 777 if (obj) { 778 err_puts(&m, m.i915->engine[i]->name); 779 if (ee->context.pid) 780 err_printf(&m, " (submitted by %s [%d], ctx %d [%d], score %d%s)", 781 ee->context.comm, 782 ee->context.pid, 783 ee->context.handle, 784 ee->context.hw_id, 785 ee->context.ban_score, 786 bannable(&ee->context)); 787 err_printf(&m, " --- gtt_offset = 0x%08x %08x\n", 788 upper_32_bits(obj->gtt_offset), 789 lower_32_bits(obj->gtt_offset)); 790 print_error_obj(&m, m.i915->engine[i], NULL, obj); 791 } 792 793 for (j = 0; j < ee->user_bo_count; j++) 794 print_error_obj(&m, m.i915->engine[i], 795 "user", ee->user_bo[j]); 796 797 if (ee->num_requests) { 798 err_printf(&m, "%s --- %d requests\n", 799 m.i915->engine[i]->name, 800 ee->num_requests); 801 for (j = 0; j < ee->num_requests; j++) 802 error_print_request(&m, " ", 803 &ee->requests[j], 804 error->epoch); 805 } 806 807 if (IS_ERR(ee->waiters)) { 808 err_printf(&m, "%s --- ? waiters [unable to acquire spinlock]\n", 809 m.i915->engine[i]->name); 810 } else if (ee->num_waiters) { 811 err_printf(&m, "%s --- %d waiters\n", 812 m.i915->engine[i]->name, 813 ee->num_waiters); 814 for (j = 0; j < ee->num_waiters; j++) { 815 err_printf(&m, " seqno 0x%08x for %s [%d]\n", 816 ee->waiters[j].seqno, 817 ee->waiters[j].comm, 818 ee->waiters[j].pid); 819 } 820 } 821 822 print_error_obj(&m, m.i915->engine[i], 823 "ringbuffer", ee->ringbuffer); 824 825 print_error_obj(&m, m.i915->engine[i], 826 "HW Status", ee->hws_page); 827 828 print_error_obj(&m, m.i915->engine[i], 829 "HW context", ee->ctx); 830 831 print_error_obj(&m, m.i915->engine[i], 832 "WA context", ee->wa_ctx); 833 834 print_error_obj(&m, m.i915->engine[i], 835 "WA batchbuffer", ee->wa_batchbuffer); 836 837 print_error_obj(&m, m.i915->engine[i], 838 "NULL context", ee->default_state); 839 } 840 841 if (error->overlay) 842 intel_overlay_print_error_state(&m, error->overlay); 843 844 if (error->display) 845 intel_display_print_error_state(&m, error->display); 846 847 err_print_capabilities(&m, &error->device_info, &error->driver_caps); 848 err_print_params(&m, &error->params); 849 err_print_uc(&m, &error->uc); 850 851 if (m.buf) { 852 __sg_set_buf(m.cur++, m.buf, m.bytes, m.iter); 853 m.bytes = 0; > 854 m.buf = 0; 855 } 856 if (m.cur) { 857 GEM_BUG_ON(m.end < m.cur); 858 sg_mark_end(m.cur - 1); 859 } 860 GEM_BUG_ON(m.sgl && !m.cur); 861 862 if (m.err) { 863 err_free_sgl(m.sgl); 864 return m.err; 865 } 866 867 if (cmpxchg(&error->sgl, NULL, m.sgl)) 868 err_free_sgl(m.sgl); 869 870 return 0; 871 } 872 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
