Re: [PATCH 3/4] drm/i915: Preparations for enabling Y210, Y212, Y216 formats

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Hi,


On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas <vidya.srinivas@xxxxxxxxx>

Signed-off-by: Swati Sharma <swati2.sharma@xxxxxxxxx>
Signed-off-by: Vidya Srinivas <vidya.srinivas@xxxxxxxxx>
---
  drivers/gpu/drm/i915/intel_display.c | 15 +++++++++++++++
  drivers/gpu/drm/i915/intel_sprite.c  |  3 +++
  2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 30fdfd1..91aa8cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3511,6 +3511,12 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
  		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
  	case DRM_FORMAT_NV12:
  		return PLANE_CTL_FORMAT_NV12;
+	case DRM_FORMAT_Y210:
+		return PLANE_CTL_FORMAT_Y210;
+	case DRM_FORMAT_Y212:
+		return PLANE_CTL_FORMAT_Y212;
+	case DRM_FORMAT_Y216:
+		return PLANE_CTL_FORMAT_Y216;
While programming YUV pixel format, you also need to program order of samples in bits [17:16] BTW 64 bits pixel format are not supported in all the planes, these are supported only in HDR planes.
You should handle that as well.

-Mahesh
  	default:
  		MISSING_CASE(pixel_format);
  	}
@@ -4959,6 +4965,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_VYUY:
  	case DRM_FORMAT_NV12:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
  		break;
  	default:
  		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -13413,6 +13422,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
  	case DRM_FORMAT_YVYU:
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
  	case DRM_FORMAT_NV12:
  		if (modifier == I915_FORMAT_MOD_Yf_TILED)
  			return true;
@@ -14544,6 +14556,9 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_YVYU:
  	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
  		if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) {
  			DRM_DEBUG_KMS("unsupported pixel format: %s\n",
  				      drm_get_format_name(mode_cmd->pixel_format, &format_name));
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index c286dda..417501f 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1419,6 +1419,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
  	case DRM_FORMAT_YVYU:
  	case DRM_FORMAT_UYVY:
  	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_Y210:
+	case DRM_FORMAT_Y212:
+	case DRM_FORMAT_Y216:
  	case DRM_FORMAT_NV12:
  		if (modifier == I915_FORMAT_MOD_Yf_TILED)
  			return true;

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