>-----Original Message-----
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
>Cc: Navare, Manasi D <manasi.d.navare@xxxxxxxxx>; Singh, Gaurav K
><gaurav.k.singh@xxxxxxxxx>; Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>; Ville
>Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>; Srivatsa, Anusha
><anusha.srivatsa@xxxxxxxxx>
>Subject: [PATCH v2 11/23] drm/i915/dp: Add DSC params and DSC config to
>intel_crtc_state
>
>Basic DSC parameters and DSC configuration data needs to be computed for each
>of the requested mode during atomic check. This is required since for certain
>modes, valid DSC parameters and config data might not be computed in which
>case compression cannot be enabled for that mode.
>For that reason we need to add these params and config structure to the
>intel_crtc_state so that if valid this state information can directly be used while
>enabling DSC in atomic commit.
>
>Cc: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
>Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
>Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
>Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
>Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
>---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_drv.h | 9 +++++++++
> 2 files changed, 10 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 0f49f99..334a5db 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -52,6 +52,7 @@
> #include <drm/drm_gem.h>
> #include <drm/drm_auth.h>
> #include <drm/drm_cache.h>
>+#include <drm/drm_dsc.h>
>
> #include "i915_params.h"
> #include "i915_reg.h"
>diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>index 68b2401..b7c2652 100644
>--- a/drivers/gpu/drm/i915/intel_drv.h
>+++ b/drivers/gpu/drm/i915/intel_drv.h
>@@ -895,6 +895,15 @@ struct intel_crtc_state {
>
> /* output format is YCBCR 4:2:0 */
> bool ycbcr420;
>+
>+ /* Display Stream compression state */
>+ struct {
>+ bool compression_enable;
>+ bool dsc_split;
>+ u16 compressed_bpp;
>+ u8 slice_count;
>+ } dsc_params;
>+ struct drm_dsc_config dp_dsc_cfg;
> };
>
> struct intel_crtc {
>--
>2.7.4
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