Quoting Chris Wilson (2018-08-14 14:11:50) > Before a reset, we set the STOP_RING bit of RING_MI_MODE to freeze the > engine. However, sometimes we observe that upon restart, the engine > freezes again with the STOP_RING bit still asserted. By inspection, we > know that the register itself is cleared by the GPU reset, so that bit > must be preserved inside the context image and reloaded from there. A > simple fix (as the RING_MI_MODE is at a fixed offset in a valid context) > is to clobber the STOP_RING bit inside the image before replaying the > request. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > Cc: Michel Thierry <michel.thierry@xxxxxxxxx> > Cc: Michał Winiarski <michal.winiarski@xxxxxxxxx> Note that we need to improve the active request tracking before this is 100% reliable. One patch at a time; though you can look at the i915_reset.c restructuring series to see what I have in mind. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
