IPC was only added in SKL+(actually we don't even enable for SKL due WA) so without this change, driver was writing to a reserved bit. Also check for the WA in intel_init_ipc() to avoid further writes to ipc_enabled. Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e45ab21e8566..0ab10a974850 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6107,10 +6107,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv) u32 val; /* Display WA #0477 WaDisableIPC: skl */ - if (IS_SKYLAKE(dev_priv)) { - dev_priv->ipc_enabled = false; + if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv)) return; - } val = I915_READ(DISP_ARB_CTL2); @@ -6125,7 +6123,9 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv) void intel_init_ipc(struct drm_i915_private *dev_priv) { dev_priv->ipc_enabled = false; - if (!HAS_IPC(dev_priv)) + + /* Display WA #0477 WaDisableIPC: skl */ + if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv)) return; dev_priv->ipc_enabled = true; -- 2.18.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx