== Series Details == Series: Display Stream Compression enabling on eDP/DP (rev3) URL : https://patchwork.freedesktop.org/series/47514/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4624 -> Patchwork_9864 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/47514/revisions/3/mbox/ == Known issues == Here are the changes found in Patchwork_9864 that come from known issues: === IGT changes === ==== Issues hit ==== igt@drv_selftest@live_coherency: fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164) igt@drv_selftest@live_workarounds: {fi-bsw-kefka}: PASS -> DMESG-FAIL (fdo#107292) fi-cnl-psr: PASS -> DMESG-FAIL (fdo#107292) igt@kms_chamelium@dp-edid-read: fi-kbl-7500u: PASS -> FAIL (fdo#103841) igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: PASS -> DMESG-FAIL (fdo#106103, fdo#102614) {igt@kms_psr@primary_mmap_gtt}: fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372) ==== Possible fixes ==== igt@drv_selftest@live_hangcheck: fi-kbl-7560u: DMESG-FAIL (fdo#106947, fdo#106560) -> PASS fi-skl-guc: DMESG-FAIL (fdo#107174) -> PASS igt@gem_exec_suspend@basic-s3: {fi-cfl-8109u}: DMESG-WARN (fdo#107345) -> PASS +1 igt@kms_flip@basic-flip-vs-modeset: {fi-cfl-8109u}: INCOMPLETE (fdo#107468) -> PASS igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174 fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292 fdo#107345 https://bugs.freedesktop.org/show_bug.cgi?id=107345 fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372 fdo#107468 https://bugs.freedesktop.org/show_bug.cgi?id=107468 == Participating hosts (52 -> 47) == Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4624 -> Patchwork_9864 CI_DRM_4624: e885609282870bc92658a5f63d592f806e8206e8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4587: 5d78c73d871525ec9caecd88ad7d9abe36637314 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9864: d910d245a98c098a5caba9af73c1bcf6ad456c98 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d910d245a98c drm/i915/dp: Disable DSC in source by disabling DSS CTL bits d8c7d9d3b120 drm/i915/dp: Configure Display stream splitter registers during DSC enable 80b74dc61b97 drm/i915/icl: Add Display Stream Splitter control registers 51deacd428b9 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes fc37151a8ea1 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs e6b09134e9a9 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling 8a45c3bd9e1f drm/i915/dp: Enable/Disable DSC in DP Sink 1dcccc9d47d4 drm/i915/dsc: Compute Rate Control parameters for DSC f53b12e6c243 drm/i915/dsc: Define & Compute VESA DSC params 882650dcfe2e drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants e899b233c01b drm/i915/dp: Do not enable PSR2 if DSC is enabled b86b83d10bfc drm/i915/dp: Compute DSC pipe config in atomic check 91f41efbc087 drm/i915/dp: Add DSC params and DSC config to intel_crtc_state bdb5662452d7 drm/dsc: Add helpers for DSC picture parameter set infoframes 3382d55c3c90 drm/dsc: Define Rate Control values that do not change over configurations 08a99be4a6e7 drm/dsc: Define VESA Display Stream Compression Capabilities 8cd06876e63d drm/dsc: Define Display Stream Compression PPS infoframe 5024c746bceb drm/dp: Define payload size for DP SDP PPS packet 094f8213eaf6 drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported 84cd213b3601 drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC 3f4cbb06f531 drm/dp: DRM DP helper/macros to get DP sink DSC parameters ad45004f3beb drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init 260bd82c6e63 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9864/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
