Quoting Anuj Phogat (2018-08-03 20:24:09) > > > On Mon, Jul 30, 2018 at 5:07 AM Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > wrote: > > The register for 0xe420 is unable to hold any value, including > this bit. The documentation is also mixed between having a > register bit for toggle and having a state command setup > for it. Apparently the register toggle is deprecated. > > > CACHE_MODE_SS is not listed in > a > gfxspecs table > which lists all > user mode > non-privileged registers. So, > do you think > making any changes > to the register > from mesa will hold? No, a privileged write to the register from inside the ring didn't stick, so something is amiss. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
