Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > We used to reset last_adj to 0 on crossing a power domain boundary, to > slow down our rate of change. However, commit 60548c554be2 ("drm/i915: > Interactive RPS mode") accidentally caused it to be reset on every > frequency update, nerfing the fast response granted by the slow start > algorithm. > > Fixes: 60548c554be2 ("drm/i915: Interactive RPS mode") > Testcase: igt/pm_rps/mix-max-config-loaded > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 2531eb75bdce..f90a3c7f1c40 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6371,7 +6371,6 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val) > new_power = HIGH_POWER; > rps_set_power(dev_priv, new_power); > mutex_unlock(&rps->power.mutex); > - rps->last_adj = 0; > } > > void intel_rps_mark_interactive(struct drm_i915_private *i915, bool interactive) > -- > 2.18.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx