Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Quoting Mika Kuoppala (2018-07-30 13:06:36) >> The register for 0xe420 is unable to hold any value, including >> this bit. The documentation is also mixed between having a >> register bit for toggle and having a state command setup >> for it. Apparently the register toggle is deprecated. >> >> Remove the register toggle as evidence shows it's futile. >> >> The thing remaining is an apology and humble request for >> Mesa folks to resurrect their state setup for this as they >> were on right track from start. >> >> This reverts commit 0bf059f3532bb39c52d917142206a8554fc2f1c5. >> >> Fixes: 0bf059f3532b ("drm/i915/icl: WaEnableFloatBlendOptimization") >> References: HSDES#1406393558 >> Cc: Oscar Mateo <oscar.mateo@xxxxxxxxx> >> Cc: Anuj Phogat <anuj.phogat@xxxxxxxxx> >> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >> Cc: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> >> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > > Acked-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > The test results do confirm the register is a red herring, but we need > someone to confirm that we aren't just using the wrong register etc. I will ask around. Thanks for ack. Pushed. -Mika _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx