On Fri, Jul 20, 2018 at 03:33:51PM +0200, Jakub Bartmiński wrote: > It would appear that the calculated GuC pin bias was larger than it > should be, as the GuC address space does NOT contain the "HW contexts RSVD" > part of the WOPCM. Thus, the GuC pin bias is simply the GuC WOPCM size. > > Signed-off-by: Jakub Bartmiński <jakub.bartminski@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Michał Winiarski <michal.winiarski@xxxxxxxxx> > Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> Cc: Jackie Li <yaodong.li@xxxxxxxxx> Matches what I was able to read on GuC view of GGTT. Reviewed-by: Michał Winiarski <michal.winiarski@xxxxxxxxx> -Michał > --- > drivers/gpu/drm/i915/intel_guc.c | 50 ++++++++++++++------------------ > 1 file changed, 22 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c > index e12bd259df17..17753952933e 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -582,50 +582,44 @@ int intel_guc_resume(struct intel_guc *guc) > * > * :: > * > - * +==============> +====================+ <== GUC_GGTT_TOP > - * ^ | | > - * | | | > - * | | DRAM | > - * | | Memory | > - * | | | > - * GuC | | > - * Address +========> +====================+ <== WOPCM Top > - * Space ^ | HW contexts RSVD | > - * | | | WOPCM | > - * | | +==> +--------------------+ <== GuC WOPCM Top > - * | GuC ^ | | > - * | GGTT | | | > - * | Pin GuC | GuC | > - * | Bias WOPCM | WOPCM | > - * | | Size | | > - * | | | | | > - * v v v | | > - * +=====+=====+==> +====================+ <== GuC WOPCM Base > - * | Non-GuC WOPCM | > - * | (HuC/Reserved) | > - * +====================+ <== WOPCM Base > + * +============> +====================+ <== GUC_GGTT_TOP > + * ^ | | > + * | | | > + * | | DRAM | > + * | | Memory | > + * | | | > + * GuC | | > + * Address +====> +====================+ <== GuC WOPCM Top > + * Space ^ | | > + * | | | | > + * | GuC | GuC | > + * | WOPCM | WOPCM | > + * | Size | | > + * | | | | > + * v v | | > + * +=======+====> +====================+ <== GuC WOPCM Base > * > * The lower part of GuC Address Space [0, ggtt_pin_bias) is mapped to WOPCM > * while upper part of GuC Address Space [ggtt_pin_bias, GUC_GGTT_TOP) is mapped > - * to DRAM. The value of the GuC ggtt_pin_bias is determined by WOPCM size and > - * actual GuC WOPCM size. > + * to DRAM. The value of the GuC ggtt_pin_bias is the GuC WOPCM size. > */ > > /** > * guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value. > * @guc: intel_guc structure. > * > - * This function will calculate and initialize the ggtt_pin_bias value based on > - * overall WOPCM size and GuC WOPCM size. > + * This function will calculate and initialize the ggtt_pin_bias value > + * based on the GuC WOPCM size. > */ > static void guc_init_ggtt_pin_bias(struct intel_guc *guc) > { > struct drm_i915_private *i915 = guc_to_i915(guc); > > GEM_BUG_ON(!i915->wopcm.size); > - GEM_BUG_ON(i915->wopcm.size < i915->wopcm.guc.base); > + GEM_BUG_ON(range_overflows(i915->wopcm.guc.base, i915->wopcm.guc.size, > + i915->wopcm.size)); > > - guc->ggtt_pin_bias = i915->wopcm.size - i915->wopcm.guc.base; > + guc->ggtt_pin_bias = i915->wopcm.guc.size; > } > > /** > -- > 2.17.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx