Re: [PATCH 3/3] drm/i915: Implement 16GB dimm wa for latency level-0

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Hi,


On 7/18/2018 5:34 PM, Ville Syrjälä wrote:
On Sat, Jul 14, 2018 at 07:40:43PM +0530, Kumar, Mahesh wrote:
Hi,

Thanks for review.


On 7/13/2018 8:27 PM, Ville Syrjälä wrote:
On Fri, Jul 13, 2018 at 07:41:24PM +0530, Mahesh Kumar wrote:
Memory with 16GB dimms require an increase of 1us in level-0 latency.
This patch implements the same.
Bspec: 4381

Signed-off-by: Mahesh Kumar <mahesh1.kumar@xxxxxxxxx>
---
   drivers/gpu/drm/i915/i915_drv.c | 35 +++++++++++++++++++++++++++++++++--
   drivers/gpu/drm/i915/i915_drv.h |  2 ++
   drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++++
   3 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b93194cbd820..c6d30653d70c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1063,6 +1063,29 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
   	intel_gvt_sanitize_options(dev_priv);
   }
+static void
+intel_memdev_is_16gb_dimm(struct memdev_info *memdev_info,
+			  u8 rank, u8 size, u8 width)
+{
+	bool found_16gb_dimm = false;
+
+	if (size == 16 && width == SKL_DRAM_WIDTH_X8 &&
+	    rank == SKL_DRAM_RANK_SINGLE)
+		found_16gb_dimm = true;
+	else if (size == 32 && width == SKL_DRAM_WIDTH_X8 &&
+		 rank == SKL_DRAM_RANK_DUAL)
+		found_16gb_dimm = true;
+	else if (size == 8 && width == SKL_DRAM_WIDTH_X16 &&
+		 rank == SKL_DRAM_RANK_SINGLE)
+		found_16gb_dimm = true;
+	else if (size == 16 && width == SKL_DRAM_WIDTH_X16 &&
+		 rank == SKL_DRAM_RANK_DUAL)
+		found_16gb_dimm = true;
+
+	if (!memdev_info->is_16gb_dimm)
+		memdev_info->is_16gb_dimm = found_16gb_dimm;
+}
Pure functions are generally more fun. Would also make the function name
match the implementation.
Are you suggesting to change the name to only "is_16gb_dimm" ?
I'm suggesting making it pure.
ok sure, got it.

-Mahesh


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