✓ Fi.CI.BAT: success for Remaining ICL display patches

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== Series Details ==

Series: Remaining ICL display patches
URL   : https://patchwork.freedesktop.org/series/46338/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4473 -> Patchwork_9618 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/46338/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9618 that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-skl-6700k2:      FAIL (fdo#103191) -> PASS

    
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191


== Participating hosts (46 -> 42) ==

  Additional (1): fi-skl-guc 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4473 -> Patchwork_9618

  CI_DRM_4473: 17c95b123220c6896ac9cf99c78be4709da704d4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4549: e19fd5549e9cf603251704117fc64f4068be5016 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9618: 71c95254a55617b1179aad69f5c53c8d843a8565 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

71c95254a556 drm/i915/icl: toggle PHY clock gating around link training
980aba720404 drm/i915/icl: program MG_DP_MODE
43efb13b9e7f drm/i915/icl: Update FIA supported lane count for hpd.
a48797927962 drm/i915/icl: implement the legacy HPD {dis, }connect flow for HDMI
b2100d0ada7f drm/i915/icl: implement the tc/legacy HPD {dis, }connect flow for DP
4b17c6d840cc drm/i915/icl: store the port type for TC ports
c0139766f2a4 drm/i915/icl: implement icl_digital_port_connected()
0b47f5ccf84a drm/i915/icl: compute the TBT PLL registers

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9618/issues.html
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